ghdl
cmd_vivado
Our great sponsors
| ghdl | cmd_vivado | |
|---|---|---|
| 26 | 1 | |
| 2,210 | 4 | |
| 2.9% | - | |
| 9.8 | 10.0 | |
| 8 days ago | over 3 years ago | |
| VHDL | Python | |
| GNU General Public License v3.0 only | - |
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
ghdl
-
GHDL on mac m1
I downloaded https://github.com/ghdl/ghdl/releases/download/v3.0.0/ghdl-macos-11-mcode.tgz and extracted it to home directory ~.
- How to compile ghdl
-
Is the VHDL standard library not publicly available?
The body is here.
-
Help on trying to find a FOSS solution to replace Quartus in my class.
GHDL + gtkwave
-
If someone is good at programming languages like C, will they be good at description languages like VHDL?
Also, VHDL has its roots in Ada, not Pascal. (In fact, the ghdl simulation tool is written in Ada.)
-
What is the netlist file format?
If the goal is simulation, the output of the process is something that can be processed by a standard compiler (like gcc or llvm) or executed by a pseudocode interpreter. See, for example, what is done by ghdl.
-
Converting VHDL to Verilog using GHDL
Maybe you could try to minimize your example to a MWE (minimum working example that demonstrates the issue) and then do a bug report against GHDL at https://github.com/ghdl/ghdl/issues
Try a question here: https://github.com/ghdl/ghdl/issues . I have only used GHDL for VHDL, and it worked well for what I was doing with it, but the creator/chief maintainer(?) (Tristan Gingold) should be able to set your issue straight in a short while, and he is pretty active on github.
-
Trouble with GHDL and GCC
Find something newer here.
-
ghdl, how to include math_real?
replying to myself: I just installed this nightly on a Win10 box and it seems to "work" based on minimal tests. Note that you need to install MinGW.
cmd_vivado
-
CI/CD for FPGA builds
I happened to come across this project yesterday which is a wrapper around the Vivado TCL scripts to provide a simpified CLI for use in build scripts etc.
What are some alternatives?
logisim-evolution - Digital logic design tool and simulator
rust_hdl
vunit - VUnit is a unit testing framework for VHDL/SystemVerilog
awesome-ada - A curated list of awesome resources related to the Ada and SPARK programming language
gtkwave - GTKWave is a fully featured GTK+ based wave viewer for Unix and Win32 which reads LXT, LXT2, VZT, FST, and GHW files as well as standard Verilog VCD/EVCD files and allows their viewing.
VHDL-Guide - VHDL Guide
ASFML - Ada binding to the SFML library
Free-Range-VHDL-book - Latex source files of the open-source book FREE RANGE VHDL
Digital - A digital logic designer and circuit simulator.
go-hdl - Hdl is a tool for easing the work with hardware description languages.
canberra-ada - Ada 2012 bindings for libcanberra
fusesoc - Package manager and build abstraction tool for FPGA/ASIC development