prjtrellis
Documenting the Lattice ECP5 bit-stream format. (by f4pga)
f4pga-examples
Example designs showing different ways to use F4PGA toolchains. (by chipsalliance)
| prjtrellis | f4pga-examples | |
|---|---|---|
| 1 | 1 | |
| 47 | 261 | |
| - | 0.8% | |
| 0.0 | 4.3 | |
| 12 months ago | about 1 month ago | |
| Python | Verilog | |
| GNU General Public License v3.0 or later | Apache License 2.0 |
The number of mentions indicates the total number of mentions that we've tracked plus the number of user suggested alternatives.
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
prjtrellis
Posts with mentions or reviews of prjtrellis.
We have used some of these posts to build our list of alternatives
and similar projects. The last one was on 2021-09-28.
f4pga-examples
Posts with mentions or reviews of f4pga-examples.
We have used some of these posts to build our list of alternatives
and similar projects. The last one was on 2021-09-28.
What are some alternatives?
When comparing prjtrellis and f4pga-examples you can also consider the following projects:
f4pga - FOSS Flow For FPGA
darkriscv - opensouce RISC-V cpu core implemented in Verilog from scratch in one night!
zipcpu - A small, light weight, RISC CPU soft core
prjxray - Documenting the Xilinx 7-series bit-stream format.
icestorm - Project IceStorm - Lattice iCE40 FPGAs Bitstream Documentaion (Reverse Engineered)
hdl - HDL libraries and projects