dvb_fpga
RTL implementation of components for DVB-S2 (by OpenResearchInstitute)
fpga_cores
To add upsizer to axi_stream_width_converter (by Abraxas3d)
dvb_fpga | fpga_cores | |
---|---|---|
2 | 2 | |
96 | 1 | |
- | - | |
2.2 | 1.3 | |
about 1 year ago | 4 months ago | |
VHDL | VHDL | |
GNU General Public License v3.0 or later | GNU General Public License v3.0 or later |
The number of mentions indicates the total number of mentions that we've tracked plus the number of user suggested alternatives.
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
dvb_fpga
Posts with mentions or reviews of dvb_fpga.
We have used some of these posts to build our list of alternatives
and similar projects.
-
HDL Coder for Software Defined Radio - taught by Mathworks presented by ORI
You can see just one example of open source FPGA design work at https://github.com/OpenResearchInstitute/dvb_fpga
-
Adapter to connect LiteFury M.2 to USB on the PC
I'm working on https://github.com/phase4ground/dvb_fpga and was hoping to use this card to test it, most cards have a ton of things I don't really need, this one seemed a nice alternative
fpga_cores
Posts with mentions or reviews of fpga_cores.
We have used some of these posts to build our list of alternatives
and similar projects.
What are some alternatives?
When comparing dvb_fpga and fpga_cores you can also consider the following projects:
pocket-cnn - CNN-to-FPGA-framework for small CNN, written in VHDL and Python
openfpga-SNES - SNES for the Analogue Pocket
spi-fpga - SPI master and SPI slave for FPGA written in VHDL
vunit - VUnit is a unit testing framework for VHDL/SystemVerilog
neorv32 - :rocket: A tiny, customizable and extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independent VHDL.
ghdl - VHDL 2008/93/87 simulator