OURS-project
PipelineC
OURS-project | PipelineC | |
---|---|---|
2 | 46 | |
604 | 544 | |
- | - | |
6.0 | 9.5 | |
11 months ago | 3 days ago | |
Python | Python | |
GNU General Public License v3.0 only | GNU General Public License v3.0 only |
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
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OURS-project
- Ours Smartphone
-
Linux Cell Phone? Build OURPhone
Direct link to the "OURS" ("Open-source, Upgradable, Repairable Smartphone") project
https://github.com/evanman83/OURS-project/
PipelineC
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PipelineC Example: FM Radio Demodulation (FPGA SDR)
Related: PipelineC: A C-like hardware description language (HDL):
https://github.com/JulianKemmerer/PipelineC
- Generate non-CPU FPGA circuits from a C-like language
- What makes C, Verilog, Java, Python, etc. so different?
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What are your private FPGA projects and why?
https://github.com/JulianKemmerer/PipelineC :)
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What's the right path to learning for someone coming from software?
However, I think its still possible to have a productive C->HDL journey. Check out PipelineC, https://github.com/JulianKemmerer/PipelineC, its meant for folks with C experience to get right into doing RTL style reasoning :)
- Seeking Advice on How to approch RTL Programming
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Using FPGAs for computations as a beginner
https://github.com/JulianKemmerer/PipelineC-Graphics/blob/main/doc/Sphery-vs-Shapes.pdf https://github.com/JulianKemmerer/PipelineC
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Generating pipeline stages automatically?
This is exactly what the PipelineC tool was made for. https://github.com/JulianKemmerer/PipelineC
- Does Xilinx use multiplication algorithms to speed up/reduce the multipliers size?
- Sphery vs. Shapes, the first raytraced game that is not software
What are some alternatives?
Newone - 3D printed, low cost transport vehicle controlled over mobile internet and programed in Python
pygears - HW Design: A Functional Approach
lib-python - Blynk IoT library for Python and Micropython
cocotb - cocotb, a coroutine based cosimulation library for writing VHDL and Verilog testbenches in Python
8Q - General Purpose 8 Qubit Optical Quantum Computer
pycparser - :snake: Complete C99 parser in pure Python
nngen - NNgen: A Fully-Customizable Hardware Synthesis Compiler for Deep Neural Network
hls4ml - Machine learning on FPGAs using HLS
antikernel - The Antikernel operating system project
bsc - Bluespec Compiler (BSC)
Silice - Silice is an easy-to-learn, powerful hardware description language, that simplifies designing hardware algorithms with parallelism and pipelines.
basejump_stl - BaseJump STL: A Standard Template Library for SystemVerilog