FactorioProcessorV5
Toolchain for a custom Factorio processor. (by alcatrazEscapee)
factorio-riscv
riscv cpu implementation in factorio combinators (by Halke1986)
FactorioProcessorV5 | factorio-riscv | |
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3 | 4 | |
19 | 15 | |
- | - | |
0.0 | 4.6 | |
almost 2 years ago | over 2 years ago | |
Python | Assembly | |
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The number of mentions indicates the total number of mentions that we've tracked plus the number of user suggested alternatives.
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
FactorioProcessorV5
Posts with mentions or reviews of FactorioProcessorV5.
We have used some of these posts to build our list of alternatives
and similar projects. The last one was on 2022-05-02.
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Playing Tetris on a general purpose Factorio CPU
There's a lot of documentation on my github, both for the processor implementation itself, and also the ISA and assembler. Including a blueprint of the entire processor, if you're interested, although feel free to message me if you have other questions, I'm happy to answer!
factorio-riscv
Posts with mentions or reviews of factorio-riscv.
We have used some of these posts to build our list of alternatives
and similar projects. The last one was on 2023-05-05.
- Interactive Chess on Factorio CPU
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My 20 IPS (instructions per second) pipelined MIPS CPU. 90% finished.
Some time ago I made a combinator CPU with a very simillar set of goals as your implementation and with very simillar results. It was a RISCV with M extension, so I could use existing compilers to compile C and C++ code for it. And it was also optimized for speed, though you beat me by 0.2 IPS ;) https://github.com/Halke1986/factorio-riscv (there are some QOL mods, but logic is vanilla).
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Playing Tetris on a general purpose Factorio CPU
I have a RISCV cpu in combinators, but the ISA has many features not well suited for Factorio, so the CPU pulls only ~3.2 ticks per instruction.
What are some alternatives?
When comparing FactorioProcessorV5 and factorio-riscv you can also consider the following projects:
Digital - A digital logic designer and circuit simulator.
verilog2factorio - This project will compile verilog (a hardware description language) into factorio blueprints.
factorio-computer - A computer built in vanilla Factorio
factorio-blueprint-assembler - Was used to generate blueprints with instructions for a CPU from a simple assembly language. It offers some functions to wire up combinators and to read and write blueprints.
factorio-magic-lamp