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Factorio-riscv Alternatives
Similar projects and alternatives to factorio-riscv
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verilog2factorio
This project will compile verilog (a hardware description language) into factorio blueprints.
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WorkOS
The modern identity platform for B2B SaaS. The APIs are flexible and easy-to-use, supporting authentication, user identity, and complex enterprise features like SSO and SCIM provisioning.
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factorio-blueprint-assembler
Was used to generate blueprints with instructions for a CPU from a simple assembly language. It offers some functions to wire up combinators and to read and write blueprints.
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InfluxDB
Power Real-Time Data Analytics at Scale. Get real-time insights from all types of time series data with InfluxDB. Ingest, query, and analyze billions of data points in real-time with unbounded cardinality.
NOTE:
The number of mentions on this list indicates mentions on common posts plus user suggested alternatives.
Hence, a higher number means a better factorio-riscv alternative or higher similarity.
factorio-riscv reviews and mentions
Posts with mentions or reviews of factorio-riscv.
We have used some of these posts to build our list of alternatives
and similar projects. The last one was on 2023-05-05.
- Interactive Chess on Factorio CPU
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My 20 IPS (instructions per second) pipelined MIPS CPU. 90% finished.
Some time ago I made a combinator CPU with a very simillar set of goals as your implementation and with very simillar results. It was a RISCV with M extension, so I could use existing compilers to compile C and C++ code for it. And it was also optimized for speed, though you beat me by 0.2 IPS ;) https://github.com/Halke1986/factorio-riscv (there are some QOL mods, but logic is vanilla).
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Playing Tetris on a general purpose Factorio CPU
I have a RISCV cpu in combinators, but the ISA has many features not well suited for Factorio, so the CPU pulls only ~3.2 ticks per instruction.
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A note from our sponsor - SaaSHub
www.saashub.com | 25 Apr 2024
Stats
Basic factorio-riscv repo stats
4
15
4.6
over 2 years ago
The primary programming language of factorio-riscv is Assembly.
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