CustomProcessor
PipelineC
CustomProcessor | PipelineC | |
---|---|---|
1 | 46 | |
5 | 544 | |
- | - | |
0.0 | 9.5 | |
over 1 year ago | 3 days ago | |
Python | Python | |
- | GNU General Public License v3.0 only |
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For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
CustomProcessor
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8-Bit Breadboard Computer, Turing complete, simulated in Python with Pygame
I simulated a 8-Bit Breadboard computer following the design by the great Ben Eater. The Logic functions without if-else statements but each component is built from smaller components. I can write custom programs in the RAM . The video you are seeing here multiplies two numbers. You can take a look at the logic on my Github: https://github.com/Lennart4711/CustomProcessor
PipelineC
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PipelineC Example: FM Radio Demodulation (FPGA SDR)
Related: PipelineC: A C-like hardware description language (HDL):
https://github.com/JulianKemmerer/PipelineC
- Generate non-CPU FPGA circuits from a C-like language
- What makes C, Verilog, Java, Python, etc. so different?
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What are your private FPGA projects and why?
https://github.com/JulianKemmerer/PipelineC :)
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What's the right path to learning for someone coming from software?
However, I think its still possible to have a productive C->HDL journey. Check out PipelineC, https://github.com/JulianKemmerer/PipelineC, its meant for folks with C experience to get right into doing RTL style reasoning :)
- Seeking Advice on How to approch RTL Programming
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Using FPGAs for computations as a beginner
https://github.com/JulianKemmerer/PipelineC-Graphics/blob/main/doc/Sphery-vs-Shapes.pdf https://github.com/JulianKemmerer/PipelineC
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Generating pipeline stages automatically?
This is exactly what the PipelineC tool was made for. https://github.com/JulianKemmerer/PipelineC
- Does Xilinx use multiplication algorithms to speed up/reduce the multipliers size?
- Sphery vs. Shapes, the first raytraced game that is not software
What are some alternatives?
turing-machine - A Python program implementing and exploiting the Minsky Turing machine considered in the paper "Intrinsic Propensity for Vulnerability in Computers? Arbitrary Code Execution in the Universal Turing Machine" as per CVE-2021-32471 (https://cve.mitre.org/cgi-bin/cvename.cgi?name=CVE-2021-32471)
pygears - HW Design: A Functional Approach
turing_machine - A simple C program to emulate two symbol turing machine
cocotb - cocotb, a coroutine based cosimulation library for writing VHDL and Verilog testbenches in Python
pycparser - :snake: Complete C99 parser in pure Python
nngen - NNgen: A Fully-Customizable Hardware Synthesis Compiler for Deep Neural Network
hls4ml - Machine learning on FPGAs using HLS
antikernel - The Antikernel operating system project
bsc - Bluespec Compiler (BSC)
Silice - Silice is an easy-to-learn, powerful hardware description language, that simplifies designing hardware algorithms with parallelism and pipelines.
basejump_stl - BaseJump STL: A Standard Template Library for SystemVerilog
hVHDL_example_project - An example project which uses many of the ideas and features of the hVHDL libraries like fixed and floating point math modules and has build scripts for most common FPGAs