bsc
chumsky
bsc | chumsky | |
---|---|---|
8 | 54 | |
880 | 3,334 | |
1.0% | - | |
8.4 | 8.8 | |
24 days ago | 5 days ago | |
Haskell | Rust | |
GNU General Public License v3.0 or later | MIT License |
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
bsc
-
Ao486_MiSTer: i486 core for the MiSTer FPGA gaming system
Many companies do just write entire modern SoCs in straight Verilog (maybe with some autogenerated Verilog hacked in there) with no other major organization tools aside from the typical project management stuff. The load-store unit of a modern CPU alone easily exceeds 10k lines of Verilog. It's a similar thing as people who work with kernels—after all, the page table management code in a modern operating system like Linux is absolutely monstrous but still people are able to understand it well enough to be able to make the changes they need and get out.
If you are interested in other languages which hope to make this sort of stuff easier, I'd recommend taking a look at design productivity languages like Chisel and it's associated Chipyard [1], SpinalHDL [2], and Bluespec [3]. Each of these are meant to make defining extremely complex hardware more manageable for humans and there's a lot of interesting work going on right now with each of them.
[1] https://github.com/ucb-bar/chipyard
[2] https://github.com/SpinalHDL/SpinalHDL
[3] https://github.com/B-Lang-org/bsc
-
Learning VDHL after knowing Verilog
What are your thoughts on other HDLs like Chisel or BlueSpec when it comes to better type checking?
-
Is “x' = f(x)” a programming paradigm?
In a previous project we used Haskell that compiled down to Verilog to design hardware. Think along the lines of BlueSpec or Clash. Haskell would force you to spell out the new state as a function of the old state of the system. This would let us do gate-level simulations of the hardware we designed. Coupled with Haskell's penchant for using primes to mean "the new value of", stuff like x' = f x was very common.
-
I'm starting a project to make a Rust-like hardware description language and I need your opinions.
You should look at Bluespec, they are doing some interesting stuff.
- Verilog Is Weird
- Bluespec hardware design language and simulation tools
-
MyHDL: Using Python as a hardware description and verification language
And I've been involved in a project that's making heavy use of Bluespec: https://github.com/B-Lang-org/bsc/
Same problem though - you have to transpile it down to Verilog to use it in anything beyond a simulation.
-
FPGA dev board that's cheap, simple and supported by OSS toolchain
FPGA Thread: Bluespec SystemVerilog is now completely open source, very nice HDL although quite opinionated.
https://github.com/B-Lang-org/bsc
it's Haskell underneath (https://xkcd.com/356/)
chumsky
-
Lezer: A Parsing System for CodeMirror, Inspired by Tree-Sitter
I attempted to use this but was disheartened but the fact that it doesn't statically type node names. Tree Sitter doesn't either but it has much more of an excuse given that it targets C.
https://github.com/lezer-parser/lezer/issues/8
The dev seems mildly hostile to outside involvement too, so I moved on. These days I use Chumsky which is Rust rather than Typescript, but also way more awesome, if you can deal with the often incomprehensible compilation errors at least!
https://github.com/zesterer/chumsky
-
nom > regex
there’s also chumsky: https://github.com/zesterer/chumsky
-
Writing an Equation Solver
We are using technique called parser combinator. And we are using a library chumsky to write parser combinators.
-
loxcraft: a compiler, language server, and online playground for the Lox programming language
rust-langdev has a lot of libraries for building compilers in Rust. Perhaps you could use these to make your implementation easier, and revisit it later if you want to build things from scratch. I'd suggest logos for lexing, LALRPOP / chumsky for parsing, and rust-gc for garbage collection.
-
Examples of function-based parsers in chumsky? Examples of unit tests?
The examples that come with chumsky and the chumsky tutorial and guide all define their parsers using closures.
-
Flamingo - A start: the syntax, a soon-to-be-built keyword-less lang with flavoured code blocks. Seeking help and advice please :)
Parser: https://crates.io/crates/chumsky
-
pep-508 v0.2.1 - Zero copy Python dependency parser written with chumsky
chumsky's zero-copy rewrite has reached its first alpha release, and I have migrated my pep-508 parser to it, as suggested in my last announcement.
-
winnow = toml_edit + combine + nom
On my side, nom is still advancing well and a new major version is in preparation, with some interesting work a new GAT based design inspired from the awesome work on chumsky, that promises to bring great performance with complex error types. 2023 will be fun for parser libraries!
-
Rust implementation of Python dependency parser for PEP 508
I am using chumsky because I like the API, but it doesn't support zero copy at the moment. Although efficiency is good to have, it is not my primary good. This will probably get supported once chumsky implements support for it (see upstream issue).
-
Question about lexer and parser generators in Rust
Checkout https://github.com/zesterer/chumsky or https://github.com/rust-bakery/nom
What are some alternatives?
chisel - Chisel: A Modern Hardware Design Language
nom - Rust parser combinator framework
UPduino-v3.0 - UPduino 3.0: new 4 layer layout, various other improvements
pest - The Elegant Parser
PipelineC - A C-like hardware description language (HDL) adding high level synthesis(HLS)-like automatic pipelining as a language construct/compiler feature.
pom - PEG parser combinators using operator overloading without macros.
linux-on-litex-vexriscv - Linux on LiteX-VexRiscv
lalrpop - LR(1) parser generator for Rust
rustylog - A Rust-like Hardware Description Language transpiled to Verilog
instaparse
fomu-toolchain - A collection of tools for developing for Fomu
combine - A parser combinator library for Rust