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verilog-ethernet

32 1,930 8.8 Verilog verilog-i2c VS verilog-ethernet

Verilog Ethernet components for FPGA implementation
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Using Si5324 as a clock generator on virtex-7 board
2 projects | /r/FPGA | 21 May 2023

For that part I think you need to use the software from silicon labs (might be skyworks now) to generate the stuff you need to write to the registers. Then, you can use something like https://github.com/alexforencich/verilog-i2c/blob/master/rtl/i2c_init.v. See https://github.com/alexforencich/verilog-ethernet/tree/master/example/HTG9200/fpga_10g for an example that targets the Si5341 specifically.