Machine readable specifications at scale

• X86-64-semantics

  1 130 10.0 Assembly

  Semantics of x86-64 in K

  

I guess I already ran into this argument in practice, with ISAs. For x86 there is an external machine-readable specification (semantics) in the K framework, built by fuzzing and reading the documentation.

• hs-arm

  1 25 10.0 Haskell

  (Dis)assembler and analyzer generated from the machine-readable ARMv8.3-A specification

If I want to use the ARM spec I have to deal with ASL, but because ASL is a simpler language there is already an independent parser/implementation, hs-arm. OTOH I won't get the nice K features like automatic verification. Apparently you wrote a tool for ISA-Formal to translate ASL to Verilog - this doesn't seem to be public though.

• InfluxDB

  www.influxdata.com featured

  Power Real-Time Data Analytics at Scale. Get real-time insights from all types of time series data with InfluxDB. Ingest, query, and analyze billions of data points in real-time with unbounded cardinality.

  

• riscv-formal

  10 550 0.0 Verilog

  RISC-V Formal Verification Framework

  

Then we have RISC, which wrote their own formal verification toolchain here. They just generate Verilog with a Python script. AFAICT this would be really hard to adapt to an assembler. Fortunately the ISA is simple to implement.

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