viv-prj-gen
tcl scripts used to build or generate vivado projects automatically (by TripRichert)
ruckus
Vivado build system (by slaclab)
Our great sponsors
| viv-prj-gen | ruckus | |
|---|---|---|
| 8 | 2 | |
| 21 | 63 | |
| - | - | |
| 1.9 | 7.4 | |
| 10 months ago | 13 days ago | |
| CMake | Tcl | |
| MIT License | GNU General Public License v3.0 or later |
The number of mentions indicates the total number of mentions that we've tracked plus the number of user suggested alternatives.
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
viv-prj-gen
Posts with mentions or reviews of viv-prj-gen.
We have used some of these posts to build our list of alternatives
and similar projects. The last one was on 2022-05-11.
- CI/CD for FPGA builds
- Vivado 2020.2 IP Repository Suggestion
- Comments and rants about tools, and a crazy idea
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Is it just me/my company or do FPGA tools and workflows suck at common software development practices like collaboration and CI/CD?
I wrote a similar cmake based project https://github.com/TripRichert/viv-prj-gen . It is no longer maintained (I wrote it as a personal project, but don't think I ever got any users for it, and can't contribute to it from work). But, It has got a tutorial https://github.com/TripRichert/viv-prj-gen/blob/master/tutorial/Tutorial.adoc , so you could check it out and see an automated workflow that I think is easy to get started with. This might give you some ideas how things could work.
- How do you manage your Vivado projects in git?
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Industry development process?
here's my script that does something similar https://github.com/TripRichert/viv-prj-gen/blob/master/tcl/gen_xactip.tcl
- What scripting languages are used in your job to help automate the design flow?
ruckus
Posts with mentions or reviews of ruckus.
We have used some of these posts to build our list of alternatives
and similar projects. The last one was on 2022-10-03.
-
Changing dev flow from GUI to command line / scripting ?
ruckus is makefile based https://github.com/slaclab/ruckus/blob/main/vivado/build.tcl
-
Is it just me/my company or do FPGA tools and workflows suck at common software development practices like collaboration and CI/CD?
https://github.com/slaclab/ruckus is a makefile/tcl based approach.
What are some alternatives?
When comparing viv-prj-gen and ruckus you can also consider the following projects:
fusesoc - Package manager and build abstraction tool for FPGA/ASIC development
Vivado_NonProjectMode_Example - An Basic Example and outline of the Vivado non Project mode Workflow
corundum - Open source FPGA-based NIC and platform for in-network compute
ghdl - VHDL 2008/93/87 simulator
Documentation - OSVVM Documentation
OsvvmLibraries - Start here. Includes all other OSVVM libraries as submodules: Utility, Common, Verification Component, and Script.
hdl - HDL libraries and projects