Is it just me/my company or do FPGA tools and workflows suck at common software development practices like collaboration and CI/CD?

This page summarizes the projects mentioned and recommended in the original post on /r/FPGA

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  • ruckus

    Vivado build system

  • https://github.com/slaclab/ruckus is a makefile/tcl based approach.

  • viv-prj-gen

    tcl scripts used to build or generate vivado projects automatically

  • I wrote a similar cmake based project https://github.com/TripRichert/viv-prj-gen . It is no longer maintained (I wrote it as a personal project, but don't think I ever got any users for it, and can't contribute to it from work). But, It has got a tutorial https://github.com/TripRichert/viv-prj-gen/blob/master/tutorial/Tutorial.adoc , so you could check it out and see an automated workflow that I think is easy to get started with. This might give you some ideas how things could work.

  • InfluxDB

    Power Real-Time Data Analytics at Scale. Get real-time insights from all types of time series data with InfluxDB. Ingest, query, and analyze billions of data points in real-time with unbounded cardinality.

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  • Vivado_NonProjectMode_Example

    An Basic Example and outline of the Vivado non Project mode Workflow

NOTE: The number of mentions on this list indicates mentions on common posts plus user suggested alternatives. Hence, a higher number means a more popular project.

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