Comments and rants about tools, and a crazy idea

This page summarizes the projects mentioned and recommended in the original post on /r/FPGA
Vhdl Verification osvvm

InfluxDB - Power Real-Time Data Analytics at Scale
Get real-time insights from all types of time series data with InfluxDB. Ingest, query, and analyze billions of data points in real-time with unbounded cardinality.
www.influxdata.com
featured
SaaSHub - Software Alternatives and Reviews
SaaSHub helps you find the best software and product alternatives
www.saashub.com
featured

  • OsvvmLibraries

    Start here. Includes all other OSVVM libraries as submodules: Utility, Common, Verification Component, and Script.

    • For building simulation projects, you might consider OSVVM. See: https://github.com/OSVVM/OsvvmLibraries

  • Documentation

    OSVVM Documentation (by OSVVM)

    • The OSVVM API runs on Siemen's ModelSim/QuestaSim, Aldec's Active-HDL/Riviera-PRO, GHDL (open source), Synopsys' VCS and Cadence's Xcelium. The advantage of this is that there is one API to run any of them. It is a work in progress. We are open source and accept contributions. We have a start at running XSIM, but are not focused on that as XSIM does not yet support the OSVVM verification utility libraries (2021.1). My blog on the scripting is at: https://osvvm.org/archives/1876All documentation is here: https://github.com/OSVVM/Documentation/tree/master

  • InfluxDB

    Power Real-Time Data Analytics at Scale. Get real-time insights from all types of time series data with InfluxDB. Ingest, query, and analyze billions of data points in real-time with unbounded cardinality.

    InfluxDB logo

  • viv-prj-gen

    tcl scripts used to build or generate vivado projects automatically

NOTE: The number of mentions on this list indicates mentions on common posts plus user suggested alternatives. Hence, a higher number means a more popular project.

Suggest a related project

Related posts

  • I made an AXI introduction video! including an AXI-Lite master read and write example!

    2 projects | /r/FPGA | 2 Feb 2023

  • Reference of verification IPs

    7 projects | /r/FPGA | 2 Nov 2022

  • Designing a Low Latency 10G Ethernet Core

    2 projects | /r/FPGA | 4 Jul 2023

  • Use cocotb to test and verify chip designs in Python

    1 project | /r/cocotb | 12 Apr 2023

  • Software languages vs HDLs for verification

    3 projects | /r/FPGA | 11 Feb 2023