tinygpus
Silice
tinygpus | Silice | |
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2 | 10 | |
89 | 1,238 | |
- | - | |
4.6 | 9.2 | |
17 days ago | 7 days ago | |
Lua | C++ | |
GNU General Public License v3.0 only | GNU General Public License v3.0 or later |
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
tinygpus
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Unreasonably effective – How video games use LUTs and how you can too
- actual lookup table generation: https://github.com/sylefeb/tinygpus/blob/498be1b803d0950328a...
Sine tables are also very typical, for animating things on screen or plain
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Running Quake on an FPGA (Custom MRISC32 CPU) [video]
Very, very impressive works, both MRISC32 and FuryGPU (which I just learned about, love the idea of a FPGA-retro-GPU that could go in a modern computer!). It's hard to overstate the amount of passion, care and technical expertise that go into such projects.
I'm the author of 'q5k' (Quake viewer in 5K LUTs) and so I wanted to say Hi to my fellow Quake-on-FPGA enthusiasts. Thanks for the mention, and looking forward to the next steps of your projects!
PS: Q5k is of course much, much slower (runs on a small $10 ice40 up5k FPGA), and only a viewer. The renderer is custom using fixed-point only. Unlikely I'll be ever able to run the full game at any decent speed, but I'm surely going to try :) For anyone interested, here's the repo of q5k and doomchip-onice: https://github.com/sylefeb/tinygpus
Silice
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Unreasonably effective – How video games use LUTs and how you can too
- how it is computed: https://github.com/sylefeb/Silice/blob/master/projects/ice-v...
Julia fractal, with a table to do integer multiply! (2.a.b = (a+b)^2 - a^2 - b^2, so just precompute all x^2 in a table! )
- Running Quake on an FPGA (Custom MRISC32 CPU) [video]
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Another World Ported to FPGA
For anyone confused by the HDL, it's the authors custom language: https://github.com/sylefeb/Silice/tree/master
It provides a compiler to Verilog that then can be fed to traditional design flows.
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An addressable little explored language gap: HDL - Hardware Description Languages, any language used for electronic circuit design, description, and specs
Have a look at Silice, it's brilliant.
- FCCM'22 Tutorial: Recent Developments in Hardware Description Languages
- GitHub - sylefeb/Silice: Silice is an open source language that simplifies prototyping and writing algorithms on FPGA architectures.
- Silice: A language for hardcoding Algorithms into FPGA hardware
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The Ice-V: a simple, compact RISC-V RV32I implementation in Silice
I was more interested in the Silice project above:
https://github.com/sylefeb/Silice/tree/draft
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How to contribute to open source?
I'm an intern at a french IT lab and my boss is working on an open-source FPGA language, you might want to check it out https://github.com/sylefeb/Silice .
What are some alternatives?
hls4ml - Machine learning on FPGAs using HLS
chisel-book - Digital Design with Chisel
PipelineC - A C-like hardware description language (HDL) adding high level synthesis(HLS)-like automatic pipelining as a language construct/compiler feature.
karuta - Karuta HLS Compiler: High level synthesis from prototype based object oriented script language to RTL (Verilog) aiming to be useful for FPGA development.
openFPGALoader - Universal utility for programming FPGA
a5k - Another World on a chip
DFHDL - DFiant HDL (DFHDL): A Dataflow Hardware Descripition Language
rawpsx - adaptation/port of https://github.com/cyxx/rawgl (Another World) for the PlayStation using PSn00bSDK
aw64 - nintendo 64 port of https://github.com/fabiensanglard/Another-World-Bytecode-Interpreter/
infernal_js - Infernal Runner CPC (HTML5)
clash-ghc - Haskell to VHDL/Verilog/SystemVerilog compiler
cva6 - The CORE-V CVA6 is an Application class 6-stage RISC-V CPU capable of booting Linux