riscv-none-elf-gcc-xpack
riscv-gnu-toolchain
| riscv-none-elf-gcc-xpack | riscv-gnu-toolchain | |
|---|---|---|
| 2 | 35 | |
| 107 | 3,187 | |
| 3.7% | 4.2% | |
| 8.2 | 8.2 | |
| 13 days ago | 8 days ago | |
| C++ | C | |
| MIT License | GNU General Public License v3.0 or later |
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
riscv-none-elf-gcc-xpack
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RISC-V MCU development boards
most interesting here seems WCH CH32V20* according to their docs https://github.com/wuxx/nanoCH32V305#open-source-toolchain we can use the open source toolchain https://github.com/xpack-dev-tools/riscv-none-elf-gcc-xpack to build and flash their chips, so no need to use their IDE.
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GCC 13 Adds RISC-V T-Head Vendor Extension Collection
Yep, would be nice to get that one in, but have not seen anything beyond xpack discussion.
riscv-gnu-toolchain
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Is RISC-V ready for HPC? Evaluating the 64-core Sophon SG2042 RISC-V CPU
> no absurdely and grotesquely massive and complex compilers anywhere
Absence of evidence is not evidence of absence, and anyway there's not even an absence: https://github.com/riscv-collab/riscv-gnu-toolchain https://llvm.org/docs/RISCVUsage.html
> feature creeps on computer language syntax nowhere to be found
At least one of us is very confused, and in case it's me, how do language details matter to RISC-V?
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Help trying to build for riscv64gc-unknown-linux-musl
I then looked at the .cargo/config.toml provided by the guide and saw that it wasn't actually statically compiling the code. After a bit of tinkering and building my own toolchain from here, I ended up with this config.toml file:
- GNU toolchain for RISC-V including GCC
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Building a toolchain suitable for compiling V extension code
b) collabriscv - essentially gcc 12.2 + binutils master/2.40 as per https://github.com/riscv-collab/riscv-gnu-toolchain
- How do i specify vendor name while building the GNU toolchain?
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GCC 13 Adds RISC-V T-Head Vendor Extension Collection
Or would it be better to take what is in https://github.com/riscv-collab/riscv-gnu-toolchain which is gcc 12.2 and start from there?
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How to build toolchain with Zbs extension?
I'm not able to build https://github.com/riscv-collab/riscv-gnu-toolchain.git like this:
What are some alternatives?
riscv-isa-sim - Spike, a RISC-V ISA Simulator
riscv-binutils-gdb - RISC-V backports for binutils-gdb. Development is done upstream at the FSF.
ccache - ccache – a fast compiler cache
risc-v-examples - RISC-V examples for GD32V, K210, and QEMU
pfr - std::tuple like methods for user defined types without any macro or boilerplate code
rvv-llvm - This repository is outdated, support for RISC-V is now developed in upstream LLVM
sol2 - Sol3 (sol2 v3.0) - a C++ <-> Lua API wrapper with advanced features and top notch performance - is here, and it's great! Documentation:
buildroot - Buildroot, making embedded Linux easy. Note that this is not the official repository, but only a mirror. The official Git repository is at http://git.buildroot.net/buildroot/. Do not open issues or file pull requests here.
qemu
freedom-tools - Tools for SiFive's Freedom Platform
xv6-riscv - Xv6 for RISC-V
riscv-gcc