red-pitaya-notes
SoC
red-pitaya-notes | SoC | |
---|---|---|
1 | 1 | |
316 | 11 | |
- | - | |
9.0 | 1.1 | |
about 2 months ago | about 1 year ago | |
Tcl | VHDL | |
MIT License | - |
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For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
red-pitaya-notes
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Share data with PL from PS ( Petalinux)
configuration register module with AXI4-Lite slave interface and with a configurable number of addressable registers (FDRE). The output of each register can be individually connected to ports of other modules and output pins. If you do not need more than 32 bits of configuration registers, then AXI GPIO can be also used in a similar way.
SoC
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I2C communication between Minized to arduino
You can have a look at this : https://github.com/cteqeu/Embedded-FPGA/tree/master/MiniZED/eFPGA_I2C_PS
What are some alternatives?
cariboulite - CaribouLite turns any 40-pin Raspberry-Pi into a Tx/Rx 6GHz SDR
neo430 - :computer: A damn small msp430-compatible customizable soft-core microcontroller-like processor system written in platform-independent VHDL.
Skywave-Linux-v4 - Scripts providing efficient, powerful, yet user friendly software defined radio operation in Skywave Linux v4
Vitis_Accel_Examples - Vitis_Accel_Examples
kvm-ip-zynq - KVM over IP Gateway targeting Zynq-7000 SoC
hlslib - A collection of extensions for Vitis and Intel FPGA OpenCL to improve developer quality of life.
neorv32 - :rocket: A tiny, customizable and extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independent VHDL.
cordic - A series of CORDIC related projects
fpga-fft - A highly optimized streaming FFT core based on Bailey's 4-step large FFT algorithm
ticklecharts - Tcl wrapper around Apache ECharts.
vunit - VUnit is a unit testing framework for VHDL/SystemVerilog