red-pitaya-notes VS Vitis_Accel_Examples

Compare red-pitaya-notes vs Vitis_Accel_Examples and see what are their differences.

red-pitaya-notes

Notes on the Red Pitaya Open Source Instrument (by pavel-demin)
Dsp Fpga Linux mca nmr Radio red-pitaya redpitaya Sdr Tcl Verilog vitis vivado vna wspr Xilinx zynq
Source Code
pavel-demin.github.io
Suggest alternative
Edit details

Vitis_Accel_Examples

Vitis_Accel_Examples (by Xilinx)
vitis Xilinx alveo zynq fpga-programming soc acap
Source Code
xilinx.github.io
Suggest alternative
Edit details
InfluxDB - Power Real-Time Data Analytics at Scale
Get real-time insights from all types of time series data with InfluxDB. Ingest, query, and analyze billions of data points in real-time with unbounded cardinality.
www.influxdata.com
featured
SaaSHub - Software Alternatives and Reviews
SaaSHub helps you find the best software and product alternatives
www.saashub.com
featured
red-pitaya-notes Vitis_Accel_Examples
1 3
316 468
- 1.7%
9.0 8.0
about 2 months ago 4 months ago
Tcl Makefile
MIT License MIT License
The number of mentions indicates the total number of mentions that we've tracked plus the number of user suggested alternatives.
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.

red-pitaya-notes

Posts with mentions or reviews of red-pitaya-notes. We have used some of these posts to build our list of alternatives and similar projects.
  • Share data with PL from PS ( Petalinux)
    1 project | /r/FPGA | 21 Apr 2022
    configuration register module with AXI4-Lite slave interface and with a configurable number of addressable registers (FDRE). The output of each register can be individually connected to ports of other modules and output pins. If you do not need more than 32 bits of configuration registers, then AXI GPIO can be also used in a similar way.

Vitis_Accel_Examples

Posts with mentions or reviews of Vitis_Accel_Examples. We have used some of these posts to build our list of alternatives and similar projects. The last one was on 2022-04-06.

What are some alternatives?

When comparing red-pitaya-notes and Vitis_Accel_Examples you can also consider the following projects:

cariboulite - CaribouLite turns any 40-pin Raspberry-Pi into a Tx/Rx 6GHz SDR

XRT - Run Time for AIE and FPGA based platforms

Skywave-Linux-v4 - Scripts providing efficient, powerful, yet user friendly software defined radio operation in Skywave Linux v4

hlslib - A collection of extensions for Vitis and Intel FPGA OpenCL to improve developer quality of life.

Vitis-Tutorials - Vitis In-Depth Tutorials

cordic - A series of CORDIC related projects

Alveo-PYNQ - Introductory examples for using PYNQ with Alveo

ticklecharts - Tcl wrapper around Apache ECharts.

c8hardcaml - An implementation of a CHIP-8 machine for FPGAs in Hardcaml with a custom assembler for writing test programs

SoC - Github Repo for Embedded FPGA course by Vincent Claes

acap3-examples - Example code for APIs and features in AXIS Camera Application Platform (ACAP) version 3

red-pitaya-notes vs cariboulite Vitis_Accel_Examples vs XRT red-pitaya-notes vs Skywave-Linux-v4 Vitis_Accel_Examples vs hlslib red-pitaya-notes vs hlslib Vitis_Accel_Examples vs Vitis-Tutorials red-pitaya-notes vs cordic Vitis_Accel_Examples vs Alveo-PYNQ red-pitaya-notes vs ticklecharts Vitis_Accel_Examples vs c8hardcaml red-pitaya-notes vs SoC Vitis_Accel_Examples vs acap3-examples