picodvi
verilog-pcie
picodvi | verilog-pcie | |
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30 | 8 | |
195 | 965 | |
- | - | |
0.0 | 6.5 | |
over 3 years ago | 25 days ago | |
C | Verilog | |
BSD 3-clause "New" or "Revised" License | MIT License |
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picodvi
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FuryGpu – Custom PCIe FPGA GPU
The RP2040 is a great MCU for playing with graphics as it can bit bang VGA and DVI/HDMI. There's some info on the DVI here: https://github.com/Wren6991/PicoDVI
I wrote a couple of articles on how to do bit banged VGA on the RP2040 from scratch: https://gregchadwick.co.uk/blog/playing-with-the-pico-pt5/ and https://gregchadwick.co.uk/blog/playing-with-the-pico-pt6/ plus an intro to PIO https://gregchadwick.co.uk/blog/playing-with-the-pico-pt4/
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Video Game Module for Flipper Zero
A few years back someone was bit banging DVI and 720p 30fps video straight off the RP2040 GPIO pins with just inline resistors between not and the HDMI cable.
https://github.com/Wren6991/PicoDVI
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VGA driver using PIO and DMA on the RP2040
I have the Adafruit DVI board and have been hacking on it some. It's more fun than should be allowed.
There's a project to get this running using Rust[1]. Currently it outputs the blue channel with sync, but has trouble with the other two channels. I don't have a hardware lab with scope, logic analyzer, etc., so it's not easy for me to debug.
In the meantime, I've been doing some experiments in the C codebase as well[2], mostly in the direction of proportionally spaced bitmap text, using the fonts in the X11 distribution.
[1]: https://github.com/DusterTheFirst/pico-dvi-rs
[2]: https://github.com/Wren6991/PicoDVI/pull/48
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Recommend MCU with dual USB - one host and one device IF?
There is even bit-banged DVI library for pico.
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Show HN: PicoVGA Library – VGA/TV Display on Raspberry Pi Pico
Apparently, there is a digital video output project for the RP2040 already out there [0]! As for why digital video is more rare, it is because the common digital video formats are higher bandwidth and require higher signal integrity.
[0] https://github.com/Wren6991/PicoDVI
- Fast algorithm to scale a image
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Least resourceful 18 year old air defense ukrainian soldier with basic coding abilities
I've seen people implement DVI with PIO, and I'm sure basic missile commands wouldn't be as bandwidth-intensive as that.
- Is a Raspberry Pi Pico able to play video on a spi-tft screen?
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Help understanding current-mode and TMDS logic in DIV/HDMI.
For example this guy (https://github.com/Wren6991/PicoDVI) essentially 'bit bangs' CML. Sure its not a completely compliant implementation, but it's pretty close... In his case using a push pull with 3.3V/0V. I don't know how he's getting a 0.8V swing.
- Bitbanged DVI on the RP2040 Microcontroller
verilog-pcie
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FuryGpu – Custom PCIe FPGA GPU
The GPU uses https://github.com/alexforencich/verilog-pcie + the Xilinx PCIe hard IP core. When using the device-independent DMA engine, that library supports both Xilinx and Intel FPGAs.
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Any good tips for writing IP that inputs/outputs AXI stream?
Most definitely. Most of my stuff still uses skid buffers, but I have been converting stuff here and there to use FIFOs, and this I think was one of the first ones I did this to: https://github.com/alexforencich/verilog-pcie/blob/master/rtl/dma_client_axis_source.v. The output FIFO is the last ~70 lines or so. This one doesn't really take that much advantage over the half full feedback. I think that's the case for the PCIe write DMA engine, but that's a much more complex module.
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FPGA Dev Live Stream: PCIe DMA on Stratix 10 MX
For reference, the new DMA interface module with the generic PCIe interface is here, and the shim for Xilinx UltraScale devices is here.
- How to reprogram FPGA without loosing PCIe connection
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What do these PCIe error messages mean? Getting these messages from custom embedded hardware, but PCIe still works fine...
Try https://github.com/alexforencich/verilog-pcie/blob/master/scripts/pcie_set_speed.sh
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PCIe Express on Artix-7 Board?
You need something a bit lower-level to trigger a reset and re-enumeration of the device. I put this script together for that on linux, definitely saves a lot of reboots when the PCIe configuration does not change: https://github.com/alexforencich/verilog-pcie/blob/master/scripts/pcie_hot_reset.sh . If you do change the BAR configuration or other PCIe IP core settings, a reboot is probably necessary.
What are some alternatives?
pico-examples
dma_ip_drivers - Xilinx QDMA IP Drivers
pico-sdk
nitefury-popr
Gert-VGA-666 - Resources for Gert VGA 666
vgasim - A Video display simulator
showmewebcam - Raspberry Pi + High Quality Camera = High-quality USB Webcam!
gplgpu - GPL v3 2D/3D graphics engine in verilog
Arduino_STM32 - Arduino STM32. Hardware files to support STM32 boards, on Arduino IDE 1.8.x including LeafLabs Maple and other generic STM32F103 and STM32F407 boards.
pico-zxspectrum - ZX Spectrum for Raspberry Pico Pi RP2040
Arduino_STM32 - Arduino STM32. Hardware files to support STM32 boards, on Arduino IDE 1.8.x including LeafLabs Maple and other generic STM32F103 boards
vga-rpi - VGA interface using Raspberry Pi as a PCXT graphics card emulator