openwifi
uLab-system-builder
| openwifi | uLab-system-builder | |
|---|---|---|
| 10 | 3 | |
| 3,574 | 5 | |
| 1.6% | - | |
| 7.3 | 5.0 | |
| about 1 month ago | almost 3 years ago | |
| C | C# | |
| GNU Affero General Public License v3.0 | - |
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
openwifi
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Hold on there: WPA3 connections fail after 11 hours
There is some open source firmware for very old WiFi chips:
https://wiki.debian.org/Firmware/Open#Radio
There is also some FPGA based open source WiFi chip things:
https://github.com/open-sdr/openwifi
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WiFi: “beamforming” only begins to describe it (2014)
https://news.ycombinator.com/item?id=27133079 :
https://ans.unibs.it/projects/csi-murder/ enabled by https://github.com/open-sdr/openwifi Both partially funded by EU's Horizon2020 program.
Openwifi talk at FOSDEM 2020 https://www.youtube.com/watch?v=8q5nHUWP43U
- Tesla Coil Zenneck Wave TV White Space Wifi Network
- Any way to transmit 802.11(wifi) signals to a receiver
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Can 5G be used as surveillance radar? U.S. military funds Binghamton research
one of the developments out of his openwifi project is a 'Openwifi CSI fuzzer WiSec21 demo interview' https://www.youtube.com/watch?v=Jp2ImjCnlkQ
https://github.com/open-sdr/openwifi/blob/master/doc/app_not...
- Is there an intersection between FPGA and Wireless Comms?
- How many more years until we have a completely open source RISC-V SOC?
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Ask HN: How to get started with 5G as a software developer
You could try the Xilinx ZC706 with an ADI9361 based FMCOMMS board. The OpenWIFI team has a few configurations listed on their readme that are popular: https://github.com/open-sdr/openwifi. I think these setups will still cost >$1000USD and require considerable effort to get going - I don’t know of a <$1000 SDR setup for 5G development that would be easy to setup and get going with. Curious if anyone knows of one.
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BladeRF-wiphy: open-source IEEE 802.11 compatible Software Defined Radio modem
Nice one Nuand, the BladeRF v2 looks like a very interesting alternative SDR modem to the cheaper Adalm Pluto educational kit by Analog Devices, the manufacturer of the transceiver chip being used by the BladeRF v2.
There is another alternative open source WiFi stack, openwifi and it has been discussed in HN before [2][3].
[1]https://www.analog.com/en/design-center/evaluation-hardware-...
[2 ]https://github.com/open-sdr/openwifi
[3]https://news.ycombinator.com/item?id=24273919
uLab-system-builder
What are some alternatives?
bladeRF-wiphy - bladeRF-wiphy is an open-source IEEE 802.11 compatible software defined radio VHDL modem
Samples - 🍬 Code samples from the nanoFramework team used in testing, proof of concepts and other explorational endeavours
esp32-wifi-penetration-tool - Exploring possibilities of ESP32 platform to attack on nearby Wi-Fi networks.
mqttMultimeter - Cross platform MQTT client for MQTT debugging and message inspection. It is based on the .NET library MQTTnet.
litex - Build your hardware, easily!
Kiwi-Project-Samples - Sample projects for the uLab Kiwi FPGA + ESP32, and the Kiwi Lite development boards
gr-ieee802-11 - IEEE 802.11 a/g/p Transceiver
PlatformIO - Your Gateway to Embedded Software Development Excellence :alien:
direwolf - Dire Wolf is a software "soundcard" AX.25 packet modem/TNC and APRS encoder/decoder. It can be used stand-alone to observe APRS traffic, as a tracker, digipeater, APRStt gateway, or Internet Gateway (IGate). For more information, look at the bottom 1/4 of this page and in https://github.com/wb2osz/direwolf/blob/dev/doc/README.md
HDL_Converter - A simple tool that can be used to convert the header syntax of a verilog module or VHDL entity to an instantiation syntax and create testbench structures (top level and verify). The project is aimed at removing the need for tedious refactoring of module headers when instantiating modules or verifying individual modules with testbenches.
ZynqMP-FPGA-Linux - FPGA+SoC+Linux+Device Tree Overlay+FPGA Manager U-Boot&Linux Kernel&Debian11 Images (for Xilinx:Zynq Ultrascale+ MPSoC)
rtl-wmbus - Software defined receiver for wireless M-Bus with RTL-SDR