fpga_torture
🔥 Technology-agnostic FPGA stress-test: maximum logic utilization and high dynamic power consumption. (by stnolting)
neo430
:computer: A damn small msp430-compatible customizable soft-core microcontroller-like processor system written in platform-independent VHDL. (by stnolting)
| fpga_torture | neo430 | |
|---|---|---|
| 2 | 3 | |
| 25 | 178 | |
| - | - | |
| 0.0 | 2.8 | |
| over 1 year ago | over 2 years ago | |
| VHDL | VHDL | |
| BSD 3-clause "New" or "Revised" License | BSD 3-clause "New" or "Revised" License |
The number of mentions indicates the total number of mentions that we've tracked plus the number of user suggested alternatives.
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
fpga_torture
Posts with mentions or reviews of fpga_torture.
We have used some of these posts to build our list of alternatives
and similar projects. The last one was on 2021-09-03.
-
Testing the FPGA board
For the second test you could use something like this: https://github.com/stnolting/fpga_torture
-
Maximum FPGA resource utilization
FPGA-agnostic utilization / power-supply stress-test (VHDL): https://github.com/stnolting/fpga_torture
neo430
Posts with mentions or reviews of neo430.
We have used some of these posts to build our list of alternatives
and similar projects. The last one was on 2022-02-25.
-
looking for 16 bit RISC ISA to implement on cyclon IV FPGA
If you insist on 16-bit you could check out the neo430
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Newbie needs help on retro-computer creation.
If you want a good example of a CISC style CPU converted to an FPGA look at the Neo430 it is based on the TI MSP430.
- The NEO430 Processor
What are some alternatives?
When comparing fpga_torture and neo430 you can also consider the following projects:
sidechan - Side channel communication test within an FPGA
serv - SERV - The SErial RISC-V CPU