de10-nano VS neorv32-examples

All signals are by default internal in qsys if you don't explicitly export them. So, if you want something out of the FPGA e.g. GPIO/LED you must export them. The column named export in qsys makes the signals appear in input/output ports of the module instance so that you can put them in top module i/o and assign pin locations using assignment editor. Partially explained here: https://github.com/zangman/de10-nano/blob/eef52965cba1386c441b738010e149589b8a0ed5/docs/Simple-Hardware-Adder_-Wiring-the-components.md

The Absolute Beginner's guide to DE10NANO (https://github.com/zangman/de10-nano/wiki for those who don't know) does have all the information you need for the fpga side.

what kind of help do you need? Given the wording, I guess you are talking about intel FPGAs. In that case, this is a nice guide even if you don't have that specific board: https://github.com/zangman/de10-nano/wiki

Anyways, feel free to just download and use the debian and archlinux images, perhaps you may still find them useful :).

Btw - just noticed you're using the de10-nano. In case you want to learn more about the SoC side of things, I have an absolute beginner's guide here - https://github.com/zangman/de10-nano/wiki. It walks you through the steps to building your own linux OS and writing your first HPS to FPGA project.

About a year ago, I published my wiki on the "Absolute beginner's guide to DE10-Nano". Here is the reddit post I made back then detailing all the topics covered (Build your own Debian OS, setting up dev environment etc).

Since you have a software background it might be interest to tinker with some RISC-V setups on your boar. There are a lot of open RISC-V soft-core CPUs and SoCs available (https://riscv.org/risc-v-cores-and-soc-overview). This one also has a port for the DE10-nano board.