de10-nano
Absolute beginner's guide to the de10-nano (by zangman)
LinuxVSCppFPGA
C++ examples for accessing FPGA Soft-IP and Hard-IP with embedded Linux for Intel (ALTERA) SoC-FPGAs (Cyclone V) (by robseb)
| de10-nano | LinuxVSCppFPGA | |
|---|---|---|
| 14 | 1 | |
| 169 | 7 | |
| - | - | |
| 3.3 | 10.0 | |
| about 1 month ago | almost 3 years ago | |
| Shell | C | |
| Apache License 2.0 | MIT License |
The number of mentions indicates the total number of mentions that we've tracked plus the number of user suggested alternatives.
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
de10-nano
Posts with mentions or reviews of de10-nano.
We have used some of these posts to build our list of alternatives
and similar projects. The last one was on 2023-06-02.
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How to access GPIO from HPS?
All signals are by default internal in qsys if you don't explicitly export them. So, if you want something out of the FPGA e.g. GPIO/LED you must export them. The column named export in qsys makes the signals appear in input/output ports of the module instance so that you can put them in top module i/o and assign pin locations using assignment editor. Partially explained here: https://github.com/zangman/de10-nano/blob/eef52965cba1386c441b738010e149589b8a0ed5/docs/Simple-Hardware-Adder_-Wiring-the-components.md
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More learning material on DE10 Nano SoC+FPGA
The Absolute Beginner's guide to DE10NANO (https://github.com/zangman/de10-nano/wiki for those who don't know) does have all the information you need for the fpga side.
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Fpga hps communication
what kind of help do you need? Given the wording, I guess you are talking about intel FPGAs. In that case, this is a nice guide even if you don't have that specific board: https://github.com/zangman/de10-nano/wiki
- Besides misterFPGA what else can I play with on a DE10-nano?
- For anyone interested in building customized embedded OS components from the ground up on modern System on Chips with FPGAs in them (e.g. Xilinx Zynq SoC), this video may be useful.
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Please draw a dragon on the box
Anyways, feel free to just download and use the debian and archlinux images, perhaps you may still find them useful :).
- To Xilinx or not to Xilinx?
- On site training for SoC
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Programming a blinking LED
Btw - just noticed you're using the de10-nano. In case you want to learn more about the SoC side of things, I have an absolute beginner's guide here - https://github.com/zangman/de10-nano/wiki. It walks you through the steps to building your own linux OS and writing your first HPS to FPGA project.
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DE10-Nano - Step by step tutorial for beginners to SoC design and development
About a year ago, I published my wiki on the "Absolute beginner's guide to DE10-Nano". Here is the reddit post I made back then detailing all the topics covered (Build your own Debian OS, setting up dev environment etc).
LinuxVSCppFPGA
Posts with mentions or reviews of LinuxVSCppFPGA.
We have used some of these posts to build our list of alternatives
and similar projects. The last one was on 2023-06-02.
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How to access GPIO from HPS?
As far as I remember Xfce image from terasic do not even need device tree entry to access the FPGA portion. I was able to read/write to a custom blockram in FPGA via mmap function in linux without modifying the device tree. I do not suggest this but the Cpp code I have used was similar to this: https://github.com/robseb/LinuxVSCppFPGA/blob/master/HPSbrigeDemo/main.cpp
What are some alternatives?
When comparing de10-nano and LinuxVSCppFPGA you can also consider the following projects:
Main_MiSTer - Main MiSTer binary and Wiki
litex - Build your hardware, easily!
terasic-de10-nano-kit - Code samples for the DE10-Nano Developer Kit
blinky - Example LED blinking project for your FPGA dev board of choice
neorv32-examples - Some neorv32 examples for Intel FPGA boards using Quartus II and SEGGER Embedded Studio for RISC-V.
MOnSieurFPGA-Packages - MOnSieurFPGA Distribution Packages
neorv32 - :rocket: A tiny, customizable and extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independent VHDL.
fusesoc - Package manager and build abstraction tool for FPGA/ASIC development