cedro
microwatt
cedro | microwatt | |
---|---|---|
6 | 19 | |
44 | 643 | |
- | - | |
3.4 | 6.7 | |
about 1 year ago | 23 days ago | |
C | Verilog | |
Apache License 2.0 | GNU General Public License v3.0 or later |
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cedro
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OOP in C
I’ve built it for now in a separate branch called “self”:
git clone -b self https://github.com/Sentido-Labs/cedro.git
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What do you think about a C transpiler?
Currently, it does not make any difference whether this is one token or more because it is sent to the compiler exactly the same as it came in, but you could write a macro/plugin (src/macros/] that recognized this pattern and inserted a space right before the minus “-” sign.
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Show HN: Loop macros, label break, slices in C with the Cedro preprocessor
Hi, when I presented the first release here 8 months ago (https://news.ycombinator.com/item?id=28166125) it got interesting comments and today I’ve made a new release with additional features:
- Break out of nested loops: break label; (https://sentido-labs.com/en/library/cedro/202106171400/#labe...)
- Notation for array slices: array[start..end] (https://sentido-labs.com/en/library/cedro/202106171400/#slic...)
- Loop macros: #foreach { ... #foreach } (https://sentido-labs.com/en/library/cedro/202106171400/#loop...)
The possibility of loop macros was discussed in this thread: https://news.ycombinator.com/item?id=28166698
At the time I hadn’t figured out how to make it useful without type information, but now it works. The same for the array slice notation: it took me a while to figure out how to make it do something useful without reflection, with a purely syntantical transformation.
Loop macros are useful for the kind of things for which you would use x-macros (https://en.wikipedia.org/wiki/X_Macro), with the advantage that it does not pollute the global namespace with macro names and the body of the macro stays more similar to the final result, which makes big macros easier to read.
Since it runs before the standard C preprocessor it can do things like building up `_Generic` macros as shown in the loop macro vec example: https://sentido-labs.com/en/library/cedro/202106171400/#loop...
Source code (Apache 2.0 license): https://sentido-labs.com/en/library/ or https://github.com/Sentido-Labs/cedro
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is there a c function exit hook?
If pre-processing your code is an acceptable compromise, my Cedro pre-processor has that feature: passing a file through it produces standard C code for your compiler, and it includes a wrapper cedrocc that can be used in Unix/POSIX-style systems like Linux as a drop-in replacement for GCC: https://github.com/Sentido-Labs/cedro/
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Keeping POWER relevant in the open source world
What I’d like to do is a quick proof-of-concept to see whether whatever instructions are available in my CPU can be leveraged for UTF-8 en-/decoding.
For instance, does it work any better than my C implementation? https://github.com/Sentido-Labs/cedro/blob/master/src/cedro....
Maybe the compiler already compiles that to an optimal SIMD version, I don’t know.
microwatt
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Microwatt: A tiny Open POWER ISA softcore written in VHDL 2008
My favorite part of this project is the pretty large battery of test cases. A lot of chip rtl releases don't bother with open sourcing the verification too, and that's arguably more useful than the rtl in the first place.
https://github.com/antonblanchard/microwatt/tree/master/test...
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Arm wants to charge dramatically more for chip licenses
MicroWatt is the only one I know of.
https://github.com/antonblanchard/microwatt
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RISC-V Pushes into the Mainstream
I have several OpenPOWER systems, including the POWER9 I use as my usual desktop. Besides IBM and other server manufacturers like Tyan and Wistron, you can get them as Raptor workstations and servers.
If you want an OpenPOWER design to play with, look at Microwatt ( https://github.com/antonblanchard/microwatt ) which is complete enough to boot Linux.
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How long until RISC gets adopted for the desktop?
Not true, as of 2019 the power ISA is able to be used without needing to pay any royalties to ibm under the openpower foundation. There's already a few projects that have taken advantage of it such as libreSOC and Microwatt. Source code for various firmware components are also freely available pertaining to the power platform.
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Build Open Silicon with Google
https://github.com/antonblanchard/microwatt is an example of a Linux-capable 64-bit core that has been submitted on multiple Open MPW shuttles:
- Any raw binary generic platform-agnostic test roms for PowerPC?
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What would you think if the Amiga line jumped from PowerPc to RISC-V CPUs?
GitHub https://github.com/openpower-cores https://github.com/antonblanchard/microwatt
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Keeping POWER relevant in the open source world
At the other end of the scale, if anyone wants to play you can run a little openpower CPU on a FPGA with completely open source. https://github.com/antonblanchard/microwatt
It's capable of running Linux, some example docs are https://shenki.github.io/boot-linux-on-microwatt/
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What is your take on ISA architectures for FPGAs (x86, arm, risc-v)?
Why dismiss POWER or SPARC ? :-)
What are some alternatives?
cyclone - Cyclone is a type- and memory-safe dialect of C
chiselwatt - A tiny POWER Open ISA soft processor written in Chisel
cake - Cake a C23 front end and transpiler written in C
midimonster - Multi-protocol control & translation software (ArtNet, MIDI, OSC, sACN, ...)
a2i
Apollo-11 - Original Apollo 11 Guidance Computer (AGC) source code for the command and lunar modules.
ooduck - Duck-Typing C library based on ooc.pdf
OpenSkyStacker - Multi-platform stacker for deep-sky astrophotography.
a2o
VexRiscvBPluginGenerator
librealsense - Intel® RealSense™ SDK