oh
Verilog library for ASIC and FPGA designers (by aolofsson)
VHDL_Lib
Library of VHDL components that are useful in larger designs. (by xesscorp)
oh | VHDL_Lib | |
---|---|---|
1 | 1 | |
1,080 | 217 | |
- | - | |
4.0 | 2.5 | |
3 months ago | 7 months ago | |
Verilog | VHDL | |
MIT License | MIT License |
The number of mentions indicates the total number of mentions that we've tracked plus the number of user suggested alternatives.
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
oh
Posts with mentions or reviews of oh.
We have used some of these posts to build our list of alternatives
and similar projects. The last one was on 2021-11-06.
VHDL_Lib
Posts with mentions or reviews of VHDL_Lib.
We have used some of these posts to build our list of alternatives
and similar projects. The last one was on 2021-11-06.
What are some alternatives?
When comparing oh and VHDL_Lib you can also consider the following projects:
ibex - Ibex is a small 32 bit RISC-V CPU core, previously known as zero-riscy.
opentitan - OpenTitan: Open source silicon root of trust
fusesoc - Package manager and build abstraction tool for FPGA/ASIC development
libsv - An open source, parameterized SystemVerilog digital hardware IP library