Vitis_Accel_Examples
finn-examples
| Vitis_Accel_Examples | finn-examples | |
|---|---|---|
| 3 | 1 | |
| 467 | 159 | |
| 1.5% | 3.1% | |
| 8.0 | 0.0 | |
| 4 months ago | 8 days ago | |
| Makefile | Jupyter Notebook | |
| MIT License | BSD 3-clause "New" or "Revised" License |
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Vitis_Accel_Examples
- Can you help me dataflow checking failure on vitis hls?
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How to Implement a decision tree on FPGA?
3- Then in Vitis I have implement that if-else statement to build the hardware. I have taken this Vitis hello world example as reference to write code for decision tree.
- Design AXI4 MM -> S and S -> MM
finn-examples
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Simplifying AI to FPGA deployment, looking for opportunities
FINN can implement arbitrary and mixed precision DNNs, not just BNNs. There is an examples git repo: https://github.com/Xilinx/finn-examples
What are some alternatives?
XRT - Run Time for AIE and FPGA based platforms
Vitis-Tutorials - Vitis In-Depth Tutorials
hlslib - A collection of extensions for Vitis and Intel FPGA OpenCL to improve developer quality of life.
nngen - NNgen: A Fully-Customizable Hardware Synthesis Compiler for Deep Neural Network
red-pitaya-notes - Notes on the Red Pitaya Open Source Instrument
f4pga-arch-defs - FOSS architecture definitions of FPGA hardware useful for doing PnR device generation.
larq - An Open-Source Library for Training Binarized Neural Networks
Alveo-PYNQ - Introductory examples for using PYNQ with Alveo
rfsoc_studio - The Strathclyde RFSoC Studio Installer for PYNQ.
c8hardcaml - An implementation of a CHIP-8 machine for FPGAs in Hardcaml with a custom assembler for writing test programs