VELDT-getting-started
clash-ghc
| VELDT-getting-started | clash-ghc | |
|---|---|---|
| 2 | 33 | |
| 21 | 1,372 | |
| - | 0.9% | |
| 3.0 | 9.1 | |
| 4 months ago | 7 days ago | |
| Haskell | Haskell | |
| MIT License | BSD 2-clause "Simplified" License |
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VELDT-getting-started
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Where Lions Roam: RISC-V on the VELDT
Absolutely! I have also written a guide to getting started with Clash and the VELDT. It starts with a basic counter and builds incrementally to a UART. Definitely check out the Clash website for examples, documentation, tutorials, and blog posts! The Clash website is my go-to resource.
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Linear types for circuit design in Haskell/Clash
In terms of not just code, but also text, https://github.com/standardsemiconductor/VELDT-getting-started is a really great tutorial
clash-ghc
- Clash: A Functional Hardware Description Language
- Clash (Haskell) for ASIC design
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Building a Networked Key-Value-Store on an FPGA
> You'd be better off with a higher-level or more modern HDL that compiles to Verilog/VHDL. "Chisel" is one such.
As is Clash :) https://clash-lang.org/
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Need project idea
You can take a look at https://clash-lang.org/. There is also a book for it. https://gergo.erdi.hu/retroclash/
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5 layered CNN implementation on arduino/FPGAs [P]
I don't know much about FPGAs, but Clash lang compiles to VHDL, and might do the trick: https://clash-lang.org
- An addressable little explored language gap: HDL - Hardware Description Languages, any language used for electronic circuit design, description, and specs
- Pedagogical Downsides of Haskell
- Ask HN: Choice of HDL for an FPGA Project
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Baud rate 1.5% lower than expected, is this normal?
if you need inspiration there is a full UART core available in clash: https://github.com/clash-lang/clash-compiler/blob/master/clash-cores/src/Clash/Cores/UART.hs
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A circuit simulator that doesn't look like it was made in 2003
Perhaps peripheral (the original site has been hugged to death).
Both clashlang: https://clash-lang.org/
And Hardcaml: https://github.com/janestreet/hardcaml
have personally fueled my interest in hardware.
Dan Luu speaks eloquently and at length about how better options are needed for logic design. I would recommend both of the above to the enthusiastic novice.
What are some alternatives?
clash-spaceinvaders - Intel 8080-based Space Invaders arcade machine implemented on an FPGA, written in CLaSH
wiringPi - A Haskell binding to the wiringPi library, for using GPIO on the Raspberry Pi.
ICFP2020_Bluespec_Tutorial - Tutorial on hardware design using Bluespec BH (Bluespec Classic) for Haskell programmers at ACM ICFP 2020 conference
clash-prelude
contranomy
mercury-api - Haskell binding to Mercury API for ThingMagic RFID readers
lion - Where Lions Roam: RISC-V on the VELDT
riscv-cores-list - RISC-V Cores, SoC platforms and SoCs
amaranth - A modern hardware definition language and toolchain based on Python
verismith - Verilog Fuzzer to test the major simulators and sythesisers by generating random, valid Verilog.
hidapi - Haskell HIDAPI bindings