Silice
openFPGALoader
| Silice | openFPGALoader | |
|---|---|---|
| 10 | 13 | |
| 1,230 | 1,044 | |
| - | - | |
| 9.2 | 9.2 | |
| 5 days ago | 1 day ago | |
| C++ | C++ | |
| GNU General Public License v3.0 or later | Apache License 2.0 |
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
Silice
-
Unreasonably effective – How video games use LUTs and how you can too
- how it is computed: https://github.com/sylefeb/Silice/blob/master/projects/ice-v...
Julia fractal, with a table to do integer multiply! (2.a.b = (a+b)^2 - a^2 - b^2, so just precompute all x^2 in a table! )
- Running Quake on an FPGA (Custom MRISC32 CPU) [video]
-
Another World Ported to FPGA
For anyone confused by the HDL, it's the authors custom language: https://github.com/sylefeb/Silice/tree/master
It provides a compiler to Verilog that then can be fed to traditional design flows.
-
An addressable little explored language gap: HDL - Hardware Description Languages, any language used for electronic circuit design, description, and specs
Have a look at Silice, it's brilliant.
- FCCM'22 Tutorial: Recent Developments in Hardware Description Languages
- GitHub - sylefeb/Silice: Silice is an open source language that simplifies prototyping and writing algorithms on FPGA architectures.
- Silice: A language for hardcoding Algorithms into FPGA hardware
-
The Ice-V: a simple, compact RISC-V RV32I implementation in Silice
I was more interested in the Silice project above:
https://github.com/sylefeb/Silice/tree/draft
-
How to contribute to open source?
I'm an intern at a french IT lab and my boss is working on an open-source FPGA language, you might want to check it out https://github.com/sylefeb/Silice .
openFPGALoader
-
STEPS to install ISE 14.7 in DEBIAN 12
Another way to flash the devices in Linux is to use https://github.com/trabucayre/openFPGALoader which supports a variety of cables and devices. It also supports the Xilinx Virtual Cable protocol, which allows you to use Xilinx tools like ChipScope with almost any cable.
-
GAO under Linux
Even though I saw multiple proposed solutions around the web, I could not get the Gowin cable to be detected under Ubuntu Linux as well, so neither the programmer nor GAO could work. I tried opensource openFPGALoader as an alternative to the programmer (but not GAO of course..), but got some issues as well (not with cable, but with certain bitstreams causing the programming to hang). So the easiest solution for me to stick with Windows version.
-
issue with Gowin 20k and openFPGAloader
i could/should eventually open a ticket on the openFPGAloader indeed
-
[Asking for Help] Tang Nano 9K Programmer - Linux Ubuntu 20.04 - "No USB Cable Connection"
Most Linux users seem to prefer openFPGALoader, but if you need GAO and the other suggestions don't work you might have to use a Windows VM, thankfully Gowin IDE supports (supported?) Windows XP/7 if you want a lightweight guest.
-
Quartus on Steam Deck
You might be able to use a tool like openFPGALoader to load a bitstream onto your board from macOS.
- openFPGALoader v0.9.0: added support for flashing the Cortex M3 binary of the GW1NSR-4C
-
Gowin Programmer not working in Win11
Try openFPGALoader. It works fine in Windows 10 and Linux for me. https://github.com/trabucayre/openFPGALoader
-
Software for simulation of Gowin devices and IP?
There's the open source openFPGALoader with explicit support for macOS if i remember correctly, I'm not sure if it supports all the features but it should be a good starting point.
-
Programming over remote
u/PCB4lyfe all you need are just the drivers for the USB blaster. To load the bitstream you can use openFPGALoader https://github.com/trabucayre/openFPGALoader
-
Help me test if my Basys 3 is working or not
OP, if that doesn't work, and you feel comfortable installing openFPGALoader (https://github.com/trabucayre/openFPGALoader), I can send you the GPIO demo bitstream to put on your board.
What are some alternatives?
hls4ml - Machine learning on FPGAs using HLS
pcm - Processor Counter Monitor [Moved to: https://github.com/intel/pcm]
chisel-book - Digital Design with Chisel
XVC-FTDI-JTAG - Xilinx virtual cable server for generic FTDI 4232H.
PipelineC - A C-like hardware description language (HDL) adding high level synthesis(HLS)-like automatic pipelining as a language construct/compiler feature.
pcm - Intel® Performance Counter Monitor (Intel® PCM)
karuta - Karuta HLS Compiler: High level synthesis from prototype based object oriented script language to RTL (Verilog) aiming to be useful for FPGA development.
prjxray - Documenting the Xilinx 7-series bit-stream format.
a5k - Another World on a chip
XilinxVirtualCable - Xilinx Virtual Cable (XVC) is a TCP/IP-based protocol that acts like a JTAG cable and provides a means to access and debug your FPGA or SoC design without using a physical cable.
DFHDL - DFiant HDL (DFHDL): A Dataflow Hardware Descripition Language
neorv32 - :rocket: A tiny, customizable and extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independent VHDL.