Rudi-RV32I
A rudimental RISCV CPU supporting RV32I instructions, in VHDL (by hamsternz)
nybbleForth
Stack machine with 4-bit instructions (by larsbrinkhoff)
| Rudi-RV32I | nybbleForth | |
|---|---|---|
| 7 | 1 | |
| 106 | 67 | |
| - | - | |
| 0.0 | 0.0 | |
| over 3 years ago | over 6 years ago | |
| VHDL | Forth | |
| MIT License | - |
The number of mentions indicates the total number of mentions that we've tracked plus the number of user suggested alternatives.
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
Rudi-RV32I
Posts with mentions or reviews of Rudi-RV32I.
We have used some of these posts to build our list of alternatives
and similar projects. The last one was on 2022-01-10.
- Input Output For a custom CPU
- Requesting an existing Design Specification Sheet for a Single Cycle RISC-V processor design
- IMPLEMENTING RISC-V BASED PROCESSOR
- GUIDANCE NEEDED
- Running Hello World on a bare-metal RISC-V FPGA
- Nand2Tetris: can anyone give me a deeper insight about the ALU chip?
-
CPU DESIGN
Here was my first attempt at a RV32I design, https://github.com/hamsternz/Rudi-RV32I
nybbleForth
Posts with mentions or reviews of nybbleForth.
We have used some of these posts to build our list of alternatives
and similar projects. The last one was on 2021-04-05.
-
CPU DESIGN
Beware, however, that you'll get what you pay for. There are some very small 8b CPU's I've seen implemented in less than 1k LUTs (iCE40). (I think this was the one.) The 32b class I work with tends to require about 4k LUTs (iCE40), and while the CPU can often fit nicely in that space the rest any design using a CPU can get kind of tight. It will also cost you more to [pipeline your CPU](). The cache can be quite expensive as well, but still fits nicely within an Artix-7 35T class FPGA--depending on the size and implementation of your cache. There are also lower logic alternatives, but again ... with all of these there are performance tradeoffs. Again, you get what you pay for.
What are some alternatives?
When comparing Rudi-RV32I and nybbleForth you can also consider the following projects:
VexRiscv - A FPGA friendly 32 bit RISC-V CPU implementation
sdspi - SD-Card controller, using either SPI, SDIO, or eMMC interfaces
neorv32 - :rocket: A tiny, customizable and extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independent VHDL.
wb2axip - Bus bridges and other odds and ends
autofpga - A utility for Composing FPGA designs from Peripherals
vivado-risc-v - Xilinx Vivado block designs for FPGA RISC-V SoC running Debian Linux distro
dbgbus - A collection of debugging busses developed and presented at zipcpu.com