Rosebud
discrimination
| Rosebud | discrimination | |
|---|---|---|
| 2 | - | |
| 31 | 135 | |
| - | - | |
| 0.0 | 3.1 | |
| about 1 year ago | 3 months ago | |
| Verilog | Haskell | |
| MIT License | BSD 3-clause "New" or "Revised" License |
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Rosebud
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ASCII Comparison in VHDL
Here is a python script I wrote a while ago that takes a list of strings and generates verilog code for an efficient bit-split string matching implementation: https://github.com/ucsdsysnet/Shire/blob/master/fpga_src/accel/archive/sme/python/sme_rulecompiler.py
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What do think of Chisel HDL? is it worth learning over Verilog/SystemVerilog?
Sure, I suppose trivial code might be somewhat readable. But doing something non-trivial is a different story. For example, this is what spinal HDL generates for vexriscv: https://github.com/ucsdsysnet/Shire/blob/master/fpga_src/lib/Shire/rtl/VexRiscv.v. This isn't exactly readable. There are about 320 _zz_ signals in there that presumably didn't exist in the original scala code.
discrimination
We haven't tracked posts mentioning discrimination yet.
Tracking mentions began in Dec 2020.
What are some alternatives?
tensil - Open source machine learning accelerators
algebraic-classes - Conversions between algebraic classes and F-algebras.
chisel-book - Digital Design with Chisel
minst-idx - Read and write data in the IDX format used in e.g. the MNIST database
hashtables - Mutable hash tables for Haskell, in the ST monad
gps2htmlReport - Generates a HTML page report detailing a GPS journey, with charts, statistics and an OpenStreetMap graphic.
hebrew-time - Hebrew dates and prayer times.
witherable - Filter with effects
llrbtree - Left-leaning red-black trees
ndjson-conduit - Conduit-based parsing and serialization for newline delimited JSON
relevant-time - relevant times useful for looking forward or backward in time from a time-anchor
CTRex - Open records for Haskell