Terminal
svls
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1 | 3 | |
2 | 416 | |
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8.3 | 8.1 | |
26 days ago | 7 days ago | |
Vim Script | Rust | |
Creative Commons Zero v1.0 Universal | MIT License |
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Terminal
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How to configure vim like an IDE
If you want some inspiration, this is my vimrc
svls
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How to configure vim like an IDE
svls
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svls VS verible - a user suggested alternative
2 projects | 3 Nov 2021
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Julia Receives DARPA Award to Accelerate Electronics Simulation by 1,000x
I can attest first-hand to the "headache" that comes from semi company simulation environments. Not only are they horribly outdated (in Perl/Tcl), but they're different at every company you work at. There's no gold standard because the standard that these EDA companies ought to be making doesn't exist.
There needs to be an open initiative between semi companies to create a standard simulation environment -- with compilers, unit-test frameworks, and all sorts of simulation (gate-level, analog/mixed signal, emulation, etc). Hell, just give me a free IDE plugin for SystemVerilog that actually works.
This lack of a standard seems to me like the critical path in hardware design. I'm trying to support projects to fix this like SVLS (A language server for SystemVerilog: https://github.com/dalance/svls) but these are all hard problems to solve. This industry is relatively niche and doesn't seem to have many engineers interested in FOSS.
What are some alternatives?
rust_hdl
verible - Verible is a suite of SystemVerilog developer tools, including a parser, style-linter, formatter and language server
spf13-vim - The ultimate vim distribution
veridian - A SystemVerilog Language Server
nvim-dap - Debug Adapter Protocol client implementation for Neovim
texlab - An implementation of the Language Server Protocol for LaTeX
vim-dap - Vim/Neovim debugger plugin providing a terminal interface to the Debug Adapter Protocol
Verilog.jl - Verilog for Julia
coc-python - Python extension for coc.nvim, fork of vscode-python
circt - Circuit IR Compilers and Tools
vim-gitgutter - A Vim plugin which shows git diff markers in the sign column and stages/previews/undoes hunks and partial hunks.
RecursiveFactorization.jl