PeakRDL-uvm VS pygears

Compare PeakRDL-uvm vs pygears and see what are their differences.

PeakRDL-uvm

Generate UVM register model from compiled SystemRDL input (by SystemRDL)
uvm-register-model uvm-ral-model Asic Fpga Uvm eda registers
Source Code
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pygears

HW Design: A Functional Approach (by bogdanvuk)
Hardware Design Python Functional Hdl Simulator Fpga Asic
Source Code
pygears.org
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PeakRDL-uvm pygears
1 5
45 143
- -
5.5 0.0
3 months ago 10 months ago
Python Python
GNU General Public License v3.0 only MIT License
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PeakRDL-uvm

Posts with mentions or reviews of PeakRDL-uvm. We have used some of these posts to build our list of alternatives and similar projects. The last one was on 2022-03-20.
  • PeakRDL-Regblock: A free & open source tool that generates SystemVerilog control & status registers (CSR) from SystemRDL
    3 projects | /r/FPGA | 20 Mar 2022
    If you're interested register automation, be sure to check out some of my other projects: * systemrdl-compiler * Compiler front-end for the SystemRDL 2.0 language. Want to generate something yourself from SystemRDL input? No problem - use this language interpreter as your front-end. * PeakRDL-html * Generates dynamic and pretty looking HTML documentation * PeakRDL-ipxact * Import/export IP-XACT XML * PeakRDL-uvm * Generate a UVM register model * And a bunch of other random stuff under my SystemRDL GitHub project.

pygears

Posts with mentions or reviews of pygears. We have used some of these posts to build our list of alternatives and similar projects.

What are some alternatives?

When comparing PeakRDL-uvm and pygears you can also consider the following projects:

rggen - Code generation tool for control and status registers

PipelineC - A C-like hardware description language (HDL) adding high level synthesis(HLS)-like automatic pipelining as a language construct/compiler feature.

skywater-pdk - Open source process design kit for usage with SkyWater Technology Foundry's 130nm node.

amaranth - A modern hardware definition language and toolchain based on Python

PeakRDL-html - Generate address space documentation HTML from compiled SystemRDL input

skillbridge - A seamless python to Cadence Virtuoso Skill interface

rohd - The Rapid Open Hardware Development (ROHD) framework is a framework for describing and verifying hardware in the Dart programming language.

branding - Rocky Linux's official branding assets

FPGA_HW_SIM_FWK_2 - FPGA Hardware Simulation Framework

PeakRDL-uvm vs rggen pygears vs PipelineC PeakRDL-uvm vs skywater-pdk pygears vs amaranth PeakRDL-uvm vs PeakRDL-html pygears vs skillbridge pygears vs rohd pygears vs branding pygears vs FPGA_HW_SIM_FWK_2