OpenSERDES
sirdez
Our great sponsors
OpenSERDES | sirdez | |
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1 | 3 | |
115 | 28 | |
- | - | |
10.0 | 0.0 | |
about 2 years ago | over 1 year ago | |
Verilog | TypeScript | |
GNU General Public License v3.0 only | MIT License |
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For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
OpenSERDES
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How Much Would It Cost For A Truly Open Source RISC-V SOC?
But here is an open source ASIC-proven serdes block, [OpenSERDES](https://github.com/SparcLab/OpenSERDES). [Here's the paper describing it](https://arxiv.org/abs/2105.13256). It's only 2 Gb/s per link, but it seems like that would be enough to do DDR3. It is available on Skywater OpenPDK 130nm.
sirdez
What are some alternatives?
OpenLANE-Sky130-Physical-Design-Workshop - Documentation for the 5 day workshop: Advanced Physical Design using OpenLane/Sky130
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bitproto - The bit level data interchange format for serializing data structures (long term maintenance).