VGA
Verilog implementation of a VGA compliant with the VGA (Video Graphics Array) standard. Omar Mongy (by OmarMongy)
FPGA_DisplayPort
An implementation of DisplayPort protocol for FPGAs (by hamsternz)
VGA | FPGA_DisplayPort | |
---|---|---|
1 | 3 | |
0 | 274 | |
- | - | |
6.0 | 10.0 | |
4 months ago | almost 8 years ago | |
Verilog | VHDL | |
- | MIT License |
The number of mentions indicates the total number of mentions that we've tracked plus the number of user suggested alternatives.
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
VGA
Posts with mentions or reviews of VGA.
We have used some of these posts to build our list of alternatives
and similar projects. The last one was on 2024-03-27.
FPGA_DisplayPort
Posts with mentions or reviews of FPGA_DisplayPort.
We have used some of these posts to build our list of alternatives
and similar projects. The last one was on 2024-03-27.
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FuryGpu – Custom PCIe FPGA GPU
There is an open-source DisplayPort transmitter [1] that apparently supports multiple 2.7 Gbps lanes (albeit using family-specific SERDES/differential transceiver blocks, but I doubt that's avoidable at these speeds). This isn't PCIe, but it's also surprisingly close to PCIe 1.0 (2.5 Gbps/lane, and IIRC they use the same 8b/10b code and scrambling algorithm).
[1] https://github.com/hamsternz/FPGA_DisplayPort
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Thunderbolt 4 display converter — 1x 4-lane HBR2/DSC in, 2x 4-lane HBR2 out…dumb hobby project, what do you think?
I have quite a bit of experience working with DisplayPort on both FPGAs and ASICs, and I can tell you this: creating a very basic DisplayPort RX or TX in Verilog is an advanced project. There is some IP (see here), but that doesn't come close to covering your needs.
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FPGA for graphics processing?
It depends on what kind of processing but there's some basic hdmi and display port input and decoding examples https://github.com/hamsternz/FPGA_DisplayPort
What are some alternatives?
When comparing VGA and FPGA_DisplayPort you can also consider the following projects:
gplgpu - GPL v3 2D/3D graphics engine in verilog