systemrdl

Open-source projects categorized as systemrdl
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Language: + Python + Verilog + C++
Topics: systemrdl-compiler eda Asic registers register-descriptions
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Top 3 systemrdl Open-Source Projects

  • systemrdl-compiler

    SystemRDL 2.0 language compiler front-end

  • open-register-design-tool

    Tool to generate register RTL, models, and docs using SystemRDL or JSpec input

  • InfluxDB

    Power Real-Time Data Analytics at Scale. Get real-time insights from all types of time series data with InfluxDB. Ingest, query, and analyze billions of data points in real-time with unbounded cardinality.

    InfluxDB logo

  • PeakRDL-halcpp

    C++ 17 Hardware abstraction layer generator from systemrdl

NOTE: The open source projects on this list are ordered by number of github stars. The number of mentions indicates repo mentiontions in the last 12 Months or since we started tracking (Dec 2020).

systemrdl related posts

  • Thoughts about SystemRDL ?

    1 project | /r/FPGA | 8 Mar 2021

  • Auto Generate Header Files

    1 project | /r/FPGA | 28 Jan 2021

Index

What are some of the best open-source systemrdl projects? This list will help you:

Project Stars
1 systemrdl-compiler 222
2 open-register-design-tool 182
3 PeakRDL-halcpp 4

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