gowin_flipflop_drainer

A test case for stress testing Tang Nano 4K and 9K and Primer 20K (Gowin FPGAs) (by juj)

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gowin_flipflop_drainer reviews and mentions

Posts with mentions or reviews of gowin_flipflop_drainer. We have used some of these posts to build our list of alternatives and similar projects. The last one was on 2023-02-19.
  • PLL Rates? Can any of the Gowin parts do 1080P?
    2 projects | /r/GowinFPGA | 19 Feb 2023
    You can find a repro of this effect at https://github.com/juj/gowin_flipflop_drainer/ that you can play with yourself. See also https://www.reddit.com/r/FPGA/comments/101pagf/sipeed_tang_nano_4k_9k_gowin_fpgas_become/
  • GOWIN vs EFINIX
    1 project | /r/FPGA | 5 Jan 2023
    Right now the latest struggle is that we are blocked on this issue: https://github.com/juj/gowin_flipflop_drainer which I am not sure if it will turn out to be a killer for our project or not. Hoping for the best.
  • GOWIN FGA questions
    2 projects | /r/FPGA | 5 Jan 2023
    Overall I have enjoyed developing on these boards, although I should state that there is a bit of an outstanding trouble with these boards that has blocked my design from proceeding (check out https://github.com/juj/gowin_flipflop_drainer for details). It is still unclear if that only affects video application, general SERDES applications, or what.
  • Tang Nano 20K announced
    1 project | /r/GowinFPGA | 4 Jan 2023
    If someone has a Twitter account, could you ask Sipeed whether the new Tang Nano 20K will be immune to this problem https://github.com/juj/gowin_flipflop_drainer ?
  • Sipeed Tang Nano 4K, 9K (Gowin FPGAs) become unstable when lots of flip flops are in use
    2 projects | /r/FPGA | 3 Jan 2023
    If this was a power issue, given that the "nonsense adders" in the test case in https://github.com/juj/gowin_flipflop_drainer are operating at a high clock speed that is desynchronized from the video subsystem, then I would expect that there would have been noise present in the power delivery more or less "constantly", and at random times with respect to the video signals.
    2 projects | /r/GowinFPGA | 2 Jan 2023
    You can find the test case repository at https://github.com/juj/gowin_flipflop_drainer
  • Low prices FPGA dev board.
    2 projects | /r/FPGA | 1 Jan 2023
    I concur with Sipeed. I really like them as well, they are lean and easy to get started, although right now I am struggling with a hardware instability problem on those boards :/ ( https://github.com/juj/gowin_flipflop_drainer )
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Stats

Basic gowin_flipflop_drainer repo stats
8
21
1.1
about 1 year ago

The primary programming language of gowin_flipflop_drainer is Verilog.


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