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After some searching around I did find references to CSI RX decoders and guides on using them such as this one. I even saw that the CSI-2 RX ip is made free by Xilinx. Since I was planning on using a Lattice FPGA, I didn't want to go down that rabbit hole. Free IP doesn't meant that I get to see the source code. But I found a github project by gatecat that's an open source decoder and a w.i.p. variant that's not vendor specific. It's hard to dissect the components of this ip without knowing why these functions are necessary to get this decoder working without a reference.
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