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ULX3S_FPGA_Sobel_Edge_Detection_OV7670
Verilog design files and Icestudio file for Sobel Edge Detection with OV7670 camera using ULX3S FPGA Board
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Hi, my new project uses the opensource FPGA board, ULX3S, to implement a pipelined Sobel Edge Detection to the video output of OV7670 camera. Output display is 640x480 @ 30fps displayed to a monitor via HDMI.
I'm not much aware if it's already considered fully supported but as answered on this issue, ECP5 is the best supported FPGA for the toolchain(but its talking about nextpnr specifically tho). But personally, I found no problem with it.