RISC-V Business: Testing StarFive's VisionFive 2 SBC

This page summarizes the projects mentioned and recommended in the original post on news.ycombinator.com

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  • linux-on-litex-vexriscv

    Linux on LiteX-VexRiscv

    The repo below has support for building a 32bit RISC-V CPU for de10nano. It also includes information about booting Linux.


    The CPU will likely have a clock speed around 100Mhz, far slower than the 1.5Ghz 64bit cores on the VisionFive 2 or Pi4. The FPGA might still be useful if you want to customize the CPU or integrate other custom hardware.

  • volk

    The Vector Optimized Library of Kernels (by gnuradio)

    I wonder how much of the performance will improve when compilers get better at RISC-V.

    It's been a long time since I could beat the compiler at optimizing assembly on x86, yet in the end merely unrolling a loop and keeping an eye on write-read stalls I managed to get a simple "multiply array by const" about 56% faster:


    And that's with hardware that doesn't even have vector instructions! I'd understand GCC not supporting that yet.

    Some other quickstart docs and hot takes from me on this hardware: https://blog.habets.se/2023/01/VisionFive-2-quickstart.html

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  • riscv-profiles

    RISC-V Architecture Profiles

    Yeah unfortunately there isn't really a great place that lists all the extensions with links and ratification status.

    But anyway there is a sort of standard set of extensions that "application processors" (I guess CPUs that want to run precompiled code) should support:


    The 22 indicates the year.

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