tdt4255-chisel-intro
By PeterAaser
cortex-m0-soft-microcontroller
Soft-microcontroller implementation of an ARM Cortex-M0 (by vfinotti)
| tdt4255-chisel-intro | cortex-m0-soft-microcontroller | |
|---|---|---|
| 1 | 1 | |
| 22 | 19 | |
| - | - | |
| 0.0 | 0.0 | |
| over 3 years ago | about 5 years ago | |
| Scala | SystemVerilog | |
| - | MIT License |
The number of mentions indicates the total number of mentions that we've tracked plus the number of user suggested alternatives.
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
tdt4255-chisel-intro
Posts with mentions or reviews of tdt4255-chisel-intro.
We have used some of these posts to build our list of alternatives
and similar projects. The last one was on 2021-05-12.
-
Planning to develop a CPU on an FPGA. How can I program it?
I can recommend the coursework that I made for my university. It uses chisel (similar to verilog but less finickity and annoying) to create a five stage RISC-V 32I capable processors that can run small bare metal programs. The intro: https://github.com/PeterAaser/tdt4255-chisel-intro The 5-stage: https://github.com/PeterAaser/RISCV-FiveStage
cortex-m0-soft-microcontroller
Posts with mentions or reviews of cortex-m0-soft-microcontroller.
We have used some of these posts to build our list of alternatives
and similar projects. The last one was on 2021-05-12.
-
Planning to develop a CPU on an FPGA. How can I program it?
I did a similar project to implement a soft-microcontroller based on an ARM Cortex-M0. My strategy was to compile the code, convert the binary into ASCII and use it to initialize the value of a general purpose RAM block during HDL synthesis. In case you want to take a look: https://github.com/vfinotti/cortex-m0-soft-microcontroller. The downside is that changing the program implies in running the synthesis again.
What are some alternatives?
When comparing tdt4255-chisel-intro and cortex-m0-soft-microcontroller you can also consider the following projects:
RISCV-FiveStage - Marginally better than redstone
4-bit-CPU-Compiler - Python script to take in Pseudo assembly code and translate it into Verilog for case statements in a ROM module.