sse2neon
yenten-arm-miner-yespowerr16
sse2neon | yenten-arm-miner-yespowerr16 | |
---|---|---|
7 | 1 | |
1,224 | 2 | |
1.2% | - | |
7.3 | 0.0 | |
14 days ago | over 2 years ago | |
C++ | C | |
MIT License | GNU General Public License v3.0 or later |
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sse2neon
- sse2neon - A C/C++ header file that converts Intel SSE intrinsics to Aarch64 NEON intrinsic
- A C/C++ header file that converts Intel SSE intrinsics to Aarch64 NEON intrinsic
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Porting Architecture Specific C/C++ Intrinsics to Graviton
The sse2neon project is a quick way to get C/C++ applications compiling and running on Graviton. The sse2neon header file provides NEON implementations for x64 intrinsics so no source code changes are needed. Each function call (intrinsic) is simply replaced with NEON instructions and will just work on Graviton.
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An AWS Community Builder Story
To continue our collaboration I contributed some small changes to KasmVNC on GitHub to use sse2neon for a performance critical part of the application which uses SSE intrinsics and needed to be changed to NEON intrinsics.
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Deserializing JSON Fast
I think the talk is very clearly laid out as an incremental journey, and each stepping stone involves contextual decision-making. I don't think Andreas is saying "you must end up with the SSE2 implementation at the end". Using machine-specific intrinsics is another dependency decision very similar to deciding to use a given library. I would have loved the talk and probably still thought of it and posted it, even if it ended before the intrinsics (but I think he does an excellent job at that part too).
And porting SSE2 to Neon is actually pretty easy -- if you use https://github.com/DLTcollab/sse2neon, IME it's very easy to do incrementally (or avoid or postpone indefinitely, depending on your needs).
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PortableGL: An MIT licensed implementation of OpenGL 3.x-ish in clean C
I have a private cross-platform port, I’m waiting on the resolution of his latest GitHub issue to submit my changes. sse2neon (https://github.com/DLTcollab/sse2neon) was a big help - I also wrote a very primitive sse2scalar for raspbian builds where neon is unavailable. Honestly SIMD doesn’t help much, as you’re usually memory bound under SWGL. The biggest perf win is any amount of asynchronous execution - running off the main thread is good enough and could be applied to your library externally through a command buffer without any changes to your code.
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Success porting VCV into aarch64 linux! (Usable on Android Devices)
You should go to /include/simd and download sse2neon.h into the folder. Replace appearing in any source files in that directory with "sse2neon.h". You will still encounter errors; remove the lines causing problems, typically containing the phrase ZERO_MODE. ARM processors does not require it.
yenten-arm-miner-yespowerr16
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ARM yespower (yespowerr16) yenten miner Version 1.0 for Raspberry Pi 4 (64bit, Aarch64)
wget https://github.com/yentencoin/yenten-arm-miner-yespowerr16/releases/download/v1.0/sugarmaker_arm64
What are some alternatives?
KasmVNC - Modern VNC Server and client, web based and secure
cpuminer-opt-cpupower - Optimized multi algo CPU miner for CPUchain, Uranium-X, Cranepay, Yenten
simde - Implementations of SIMD instruction sets for systems which don't natively support them.
cpuminer - CPU miner for bitcoin
Tow-Boot - An opinionated distribution of U-Boot. — https://matrix.to/#/#Tow-Boot:matrix.org?via=matrix.org
sleef - SIMD Library for Evaluating Elementary Functions, vectorized libm and DFT
libsamplerate - An audio Sample Rate Conversion library
xmrig - RandomX, KawPow, CryptoNight and GhostRider unified CPU/GPU miner and RandomX benchmark
cglm - 📽 Highly Optimized 2D / 3D Graphics Math (glm) for C
limine - Modern, advanced, portable, multiprotocol bootloader.
android-inline-hook - :fire: ShadowHook is an Android inline hook library which supports thumb, arm32 and arm64.
aws-graviton-getting-started - Helping developers to use AWS Graviton2 and Graviton3 processors which power the 6th and 7th generation of Amazon EC2 instances (C6g[d], M6g[d], R6g[d], T4g, X2gd, C6gn, I4g, Im4gn, Is4gen, G5g, C7g[d][n], M7g[d], R7g[d]).