riscof
By riscv-software-src
riscv-code-size-reduction
By riscvarchive
| riscof | riscv-code-size-reduction | |
|---|---|---|
| 2 | 9 | |
| 60 | 150 | |
| - | - | |
| 0.0 | 6.0 | |
| 11 days ago | 2 months ago | |
| Python | Python | |
| BSD 3-clause "New" or "Revised" License | - |
The number of mentions indicates the total number of mentions that we've tracked plus the number of user suggested alternatives.
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
riscof
Posts with mentions or reviews of riscof.
We have used some of these posts to build our list of alternatives
and similar projects. The last one was on 2023-01-21.
-
Senior Design Project Ideas?
Integration of the RISCOF test framework (https://github.com/riscv-software-src/riscof)
- Available (official) test suite?
riscv-code-size-reduction
Posts with mentions or reviews of riscv-code-size-reduction.
We have used some of these posts to build our list of alternatives
and similar projects. The last one was on 2023-01-21.
- RISC-V Code Size Reduction Release v1.0 (Ratified)
-
Senior Design Project Ideas?
Support for proposed Zc* instructions (https://github.com/riscv/riscv-code-size-reduction)
- RISC-V vs. ARM embedded software perspective
- Debunking CISC vs RISC code density
- Public review for standard extensions Zc including Zca, Zcf, Zcd, Zcb, Zcmp, Zcmt
-
Code Density Compared Between Way Too Many Instruction Sets
In 64bit, RISC-V does easily beat ARM and everything else.
It's about as good as m68k and x86 in 32bit, which are quite dense. A good result. Just not as small as ARM thumb/thumb2.
This is however not going to remain so, as RISC-V will see further improvements, coming from B extension (already ratified and yet not included in the test) and from the ongoing Zc size-reduction work[0], which does already achieve significant further size reduction[1].
0. https://github.com/riscv/riscv-code-size-reduction
- Yeah, RISC-V Is Actually a Good Design
- A Big Week for RISC-V
- HarmonyOS development board shows up for $11
What are some alternatives?
When comparing riscof and riscv-code-size-reduction you can also consider the following projects:
riscv-tests
riscv-profiles - RISC-V Architecture Profiles
riscv-arch-test
minimax - Minimax: a Compressed-First, Microcoded RISC-V CPU
Artix-7-HDMI-processing - Receiving and processing 1080p HDMI audio and video on the Artix 7 FPGA
riscv-compliance