picodvi VS corundum

The RP2040 is a great MCU for playing with graphics as it can bit bang VGA and DVI/HDMI. There's some info on the DVI here: https://github.com/Wren6991/PicoDVI

I wrote a couple of articles on how to do bit banged VGA on the RP2040 from scratch: https://gregchadwick.co.uk/blog/playing-with-the-pico-pt5/ and https://gregchadwick.co.uk/blog/playing-with-the-pico-pt6/ plus an intro to PIO https://gregchadwick.co.uk/blog/playing-with-the-pico-pt4/

A few years back someone was bit banging DVI and 720p 30fps video straight off the RP2040 GPIO pins with just inline resistors between not and the HDMI cable.

https://github.com/Wren6991/PicoDVI

I have the Adafruit DVI board and have been hacking on it some. It's more fun than should be allowed.

There's a project to get this running using Rust[1]. Currently it outputs the blue channel with sync, but has trouble with the other two channels. I don't have a hardware lab with scope, logic analyzer, etc., so it's not easy for me to debug.

In the meantime, I've been doing some experiments in the C codebase as well[2], mostly in the direction of proportionally spaced bitmap text, using the fonts in the X11 distribution.

[1]: https://github.com/DusterTheFirst/pico-dvi-rs

[2]: https://github.com/Wren6991/PicoDVI/pull/48

There is even bit-banged DVI library for pico.

Apparently, there is a digital video output project for the RP2040 already out there [0]! As for why digital video is more rare, it is because the common digital video formats are higher bandwidth and require higher signal integrity.

[0] https://github.com/Wren6991/PicoDVI

I've seen people implement DVI with PIO, and I'm sure basic missile commands wouldn't be as bandwidth-intensive as that.

For example this guy (https://github.com/Wren6991/PicoDVI) essentially 'bit bangs' CML. Sure its not a completely compliant implementation, but it's pretty close... In his case using a push pull with 3.3V/0V. I don't know how he's getting a 0.8V swing.

The GPU uses this: https://github.com/alexforencich/verilog-pcie . And there is an open-source 100G NIC here, including open source 10G/25G MACs: https://github.com/corundum/corundum

Well, I did build this: https://github.com/corundum/corundum

I would look into 10GbE PCS/MAC packet processors implemented under AXI Stream interfaces for example. There are open source examples https://github.com/corundum/corundum and https://netfpga.org/ .

I built my own 100 Gbps capable NIC, along with driver: https://github.com/corundum/corundum. You're welcome to ask if you have any questions, though it is quite a different animal from a 100 Mbps NIC you might have on a microcontroller.

If you're looking for resources, here's one rather comprehensive example of a high-performance FPGA design with a fully custom DMA engine and driver, that runs on both Xilinx and Intel FPGAs: https://github.com/corundum/corundum

I have no idea, but you're welcome to build the design and look at it yourself: https://github.com/corundum/corundum/tree/master/fpga/mqnic/NetFPGA_SUME/fpga. The barrel shifters are in the DMA engine, both the read DMA and write DMA engines have wide barrel shifters.

Dive right into the slack channel and introduce yourself. There is also a new contributor guide. /u/alexforencich/ is on these reddits and he may be able to chime in and give you more concrete suggestions.