mlir-aie
circt
| mlir-aie | circt | |
|---|---|---|
| 1 | 6 | |
| 231 | 1,536 | |
| 8.7% | 3.1% | |
| 9.8 | 9.9 | |
| 4 days ago | about 19 hours ago | |
| MLIR | C++ | |
| GNU General Public License v3.0 or later | GNU General Public License v3.0 or later |
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
mlir-aie
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AMD Receives Approval for Acquisition of Xilinx
>come up with a "better" (performant, cheaper, easier to use, etc.) solution than GPUs for ML applications
you probably are aware but Xilinx themselves is attempting this with their versal aie boards which (in spirit) similar to GPUs, in that they group together a programmable fabric of programmable SIMD type compute cores.
https://www.xilinx.com/support/documentation/architecture-ma...
i have not played with one but i've been told (by a xilinx person, so grain of salt) the flow from high-level representation to that arch is more open
https://github.com/Xilinx/mlir-aie
circt
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Ask HN: How to get a job as a compiler engineer?
MLIR (https://mlir.llvm.org/) is a quickly growing compiler toolkit which attempts to synthesize the learnings of LLVM and currently powers compilers for programming languages, machine learning and circuit design (https://github.com/llvm/circt). and there are a ton of companies with real employees working on it (including Microsoft) and MLIR is at the core of Chris Lattner’s new company, ModularAI. I’d recommend taking a look at it, there are a large number of ways to get involved and a number of paths from contributor to employee.
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Rapid Open Hardware Development (ROHD) Framework by Intel
Might be good to target the CIRCT infrastructure at some point.
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TSMC eyes Germany for first European chip production plant
Even small optimizations like removing unused pins from internal modules are often times opposed.
Chris Lattner and others are currently working on an "industry" version of firrtl as part of the CIRCT hardware compiler framework: https://github.com/llvm/circt
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Chisel/Firrtl Hardware Compiler Framework
Did you see the work being done on CIRCT? https://github.com/llvm/circt
I remember one of the reasons you did not want to use firrtl was that its compiler is implemented in Scala and thus hard to integrate into other projexts. CIRCT will solve that problem by providing a firrtl compiler implemented in C++. Other languages like Verilog/VHDL and new high level languages for HLS-like designs are also on the todo list.
- Julia Receives DARPA Award to Accelerate Electronics Simulation by 1,000x
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VHDL backend
Relevant: https://github.com/llvm/circt
What are some alternatives?
torch-mlir - The Torch-MLIR project aims to provide first class support from the PyTorch ecosystem to the MLIR ecosystem.
SpinalHDL - Scala based HDL
heavydb - HeavyDB (formerly OmniSciDB)
chisel - Chisel: A Modern Hardware Design Language
iree - A retargetable MLIR-based machine learning compiler and runtime toolkit.
hdlConvertor - Fast Verilog/VHDL parser preprocessor and code generator for C++/Python based on ANTLR4
ncnn - ncnn is a high-performance neural network inference framework optimized for the mobile platform
concrete - Concrete: TFHE Compiler that converts python programs into FHE equivalent
cocotb - cocotb, a coroutine based cosimulation library for writing VHDL and Verilog testbenches in Python
amaranth - A modern hardware definition language and toolchain based on Python
svls - SystemVerilog language server