jt89
sn76489an compatible Verilog core, with emphasis on FPGA implementation and Megadrive/Master System compatibility (by jotego)
EDLA
EDLA remote logic analyser, using ESP32 and Web protocols (by jbentham)
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| jt89 | EDLA | |
|---|---|---|
| 1 | 1 | |
| 30 | 7 | |
| - | - | |
| 3.8 | 0.0 | |
| 4 months ago | almost 2 years ago | |
| Verilog | HTML | |
| GNU General Public License v3.0 only | - |
The number of mentions indicates the total number of mentions that we've tracked plus the number of user suggested alternatives.
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
jt89
Posts with mentions or reviews of jt89.
We have used some of these posts to build our list of alternatives
and similar projects. The last one was on 2022-07-08.
-
Embedded Systems Weekly #108
JT89 FPGA Clone of sn76489an hardware by Jose Tejada The FPGA clone is coded in Verilog. If the SN76489 vaguely reminds you something, it is the Texas Instruments chip used for sound generation on the BBC Micro, the Sega Megadrive, the Master System and some more...
EDLA
Posts with mentions or reviews of EDLA.
We have used some of these posts to build our list of alternatives
and similar projects. The last one was on 2022-07-08.
-
Embedded Systems Weekly #108
EDLA: remote logic analyser using ESP32 and Web protocols This is an open source design (software and hardware) of a remote logic analyser. It has 16 digital inputs and the designer claims that it can sample 20 mega-samples per second (MS/s) and store up to 250 kilo-samples.
What are some alternatives?
When comparing jt89 and EDLA you can also consider the following projects:
collisions - Hash collisions and exploitations