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jt89
sn76489an compatible Verilog core, with emphasis on FPGA implementation and Megadrive/Master System compatibility
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EDLA: remote logic analyser using ESP32 and Web protocols This is an open source design (software and hardware) of a remote logic analyser. It has 16 digital inputs and the designer claims that it can sample 20 mega-samples per second (MS/s) and store up to 250 kilo-samples.
JT89 FPGA Clone of sn76489an hardware by Jose Tejada The FPGA clone is coded in Verilog. If the SN76489 vaguely reminds you something, it is the Texas Instruments chip used for sound generation on the BBC Micro, the Sega Megadrive, the Master System and some more...
Hardening Attack Surfaces with Formally Proven Binary Format Parsers Microsoft released EverParse3D. It's a generator of formally proven binary format parsers. It generates C code and it looks like it can address any legacy binary format. Can it bring something to Linux kernel development?
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