The number of mentions indicates the total number of mentions that we've tracked plus the number of user suggested alternatives.
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
iob-soc
Posts with mentions or reviews of iob-soc.
We have used some of these posts to build our list of alternatives
and similar projects. The last one was on 2023-03-08.
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Recommendations for RISC-V on FPGA
SoC with PicoRV32 to run baremetal applications: https://github.com/IObundle/iob-soc
r5lite
Posts with mentions or reviews of r5lite.
We have used some of these posts to build our list of alternatives
and similar projects. The last one was on 2024-03-07.
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Launch HN: SiLogy (YC W24) – Chip design and verification in the cloud
It's not in gitlab's CI infrastructure, but I have continuous integration set up in a private server for https://gitlab.com/specbranch/r5lite and also for my company's proprietary hardware.
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Recommendations for RISC-V on FPGA
I wish I could recommend the one I am working on open-sourcing, but it's not exactly ready yet for a school project (shameless plug for the future: https://gitlab.com/specbranch/r5lite/) unless you are doing something very basic solely inside the core.
What are some alternatives?
When comparing iob-soc and r5lite you can also consider the following projects:
cva6 - The CORE-V CVA6 is an Application class 6-stage RISC-V CPU capable of booting Linux
neorv32 - :rocket: A tiny, customizable and extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independent VHDL.
iob-soc-opencryptolinux - Running Linux on IOb-SoC-OpenCryptoHW
vivado-risc-v - Xilinx Vivado block designs for FPGA RISC-V SoC running Debian Linux distro
PurdNyUart
rocket-chip - Rocket Chip Generator