cvfpu
Parametric floating-point unit with support for standard RISC-V formats and operations as well as transprecision formats. (by openhwgroup)
hlsVHDL_floating_point
By hlsVHDL
Our great sponsors
cvfpu | hlsVHDL_floating_point | |
---|---|---|
1 | 1 | |
363 | 0 | |
5.0% | - | |
4.9 | 10.0 | |
about 1 month ago | almost 2 years ago | |
SystemVerilog | VHDL | |
Apache License 2.0 | MIT License |
The number of mentions indicates the total number of mentions that we've tracked plus the number of user suggested alternatives.
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
cvfpu
Posts with mentions or reviews of cvfpu.
We have used some of these posts to build our list of alternatives
and similar projects. The last one was on 2022-06-10.
-
Got any good reads on floating point math design?
OpenHWGroup's CVFPU (SystemVerilog), this is used by the CV32E40P. I had a go with this but couldn't get it to synthesise in Quartus Prime Lite.
hlsVHDL_floating_point
Posts with mentions or reviews of hlsVHDL_floating_point.
We have used some of these posts to build our list of alternatives
and similar projects. The last one was on 2022-06-10.
What are some alternatives?
When comparing cvfpu and hlsVHDL_floating_point you can also consider the following projects:
fpu-sp - IEEE 754 floating point library in system-verilog and vhdl
mrisc32-a1 - A pipelined, in-order, scalar VHDL implementation of the MRISC32 ISA