acap3-examples
Vitis_Accel_Examples
acap3-examples | Vitis_Accel_Examples | |
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2 | 3 | |
54 | 467 | |
- | 1.5% | |
5.1 | 8.0 | |
2 days ago | 4 months ago | |
C | Makefile | |
Apache License 2.0 | MIT License |
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acap3-examples
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How to select hardware for my Project?
Not cheap, but Axis cameras are Linux-based and allow for extensive customization of the “embedded device” aspect through their ACAP SDK. You can work in Python, access the raw image stream with OpenCV, add custom event handling, etc. Some of the newer models have a neural network accelerator so you can even run your own Tensorflow Lite model for object detection on-camera.
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Issues cross-compiling rust to armv7
(build from this: https://github.com/AxisCommunications/acap3-examples/tree/master/vdostream)
Vitis_Accel_Examples
- Can you help me dataflow checking failure on vitis hls?
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How to Implement a decision tree on FPGA?
3- Then in Vitis I have implement that if-else statement to build the hardware. I have taken this Vitis hello world example as reference to write code for decision tree.
- Design AXI4 MM -> S and S -> MM
What are some alternatives?
esp32-cam-webserver - Expanded version of the Espressif ESP webcam
XRT - Run Time for AIE and FPGA based platforms
yi-hack-Allwinner - Custom firmware for Yi 1080p camera based on Allwinner platform
hlslib - A collection of extensions for Vitis and Intel FPGA OpenCL to improve developer quality of life.
webviewjar - Java port of the Zserge Webview. Tiny cross-platform WebView
red-pitaya-notes - Notes on the Red Pitaya Open Source Instrument
raspindi - Raspberry Pi Camera NDI Source application
Vitis-Tutorials - Vitis In-Depth Tutorials
Alveo-PYNQ - Introductory examples for using PYNQ with Alveo
c8hardcaml - An implementation of a CHIP-8 machine for FPGAs in Hardcaml with a custom assembler for writing test programs
SoC - Github Repo for Embedded FPGA course by Vincent Claes
finn-examples - Dataflow QNN inference accelerator examples on FPGAs