PeakRDL-html
systemrdl-compiler
PeakRDL-html | systemrdl-compiler | |
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1 | 1 | |
44 | 222 | |
- | 0.9% | |
5.9 | 7.3 | |
6 months ago | about 1 month ago | |
JavaScript | Python | |
GNU General Public License v3.0 only | MIT License |
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PeakRDL-html
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PeakRDL-Regblock: A free & open source tool that generates SystemVerilog control & status registers (CSR) from SystemRDL
If you're interested register automation, be sure to check out some of my other projects: * systemrdl-compiler * Compiler front-end for the SystemRDL 2.0 language. Want to generate something yourself from SystemRDL input? No problem - use this language interpreter as your front-end. * PeakRDL-html * Generates dynamic and pretty looking HTML documentation * PeakRDL-ipxact * Import/export IP-XACT XML * PeakRDL-uvm * Generate a UVM register model * And a bunch of other random stuff under my SystemRDL GitHub project.
systemrdl-compiler
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Tool to generate table of memory-mapped register?
Also I would recommend SystemRDL for creating a definition usable in code generators: https://github.com/SystemRDL/systemrdl-compiler
What are some alternatives?
retype - Retype is an ✨ ultra-high-performance✨ static site generator that builds a website based on simple text files.
PeakRDL-ipxact - Import and export IP-XACT XML register models
PeakRDL-halcpp - C++ 17 Hardware abstraction layer generator from systemrdl
open-register-design-tool - Tool to generate register RTL, models, and docs using SystemRDL or JSpec input
wavedrom - :ocean: Digital timing diagram rendering engine
PeakRDL-uvm - Generate UVM register model from compiled SystemRDL input
rggen - Code generation tool for control and status registers
insomnia-documenter - Tool to create minimalist and beautiful API documentation pages using your Insomnia workspace export file.
joes-sandbox
mrisc32 - MRSIC32 ISA documentation and development
PeakRDL-pdf - Converts the SystemRDL data into pdf Register specification