Tool to generate table of memory-mapped register?

This page summarizes the projects mentioned and recommended in the original post on /r/FPGA

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  • mrisc32

    Discontinued MRSIC32 ISA documentation and development

    I use it extensively in my MRISC32 ISA manual (much of which is generated by a Python script): https://github.com/mrisc32/mrisc32

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  • wavedrom

    :ocean: Digital timing diagram rendering engine

  • systemrdl-compiler

    SystemRDL 2.0 language compiler front-end

    Also I would recommend SystemRDL for creating a definition usable in code generators: https://github.com/SystemRDL/systemrdl-compiler

  • joes-sandbox

  • PeakRDL-pdf

    Converts the SystemRDL data into pdf Register specification

NOTE: The number of mentions on this list indicates mentions on common posts plus user suggested alternatives. Hence, a higher number means a more popular project.

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